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AT697F 데이터시트(PDF) 128 Page - ATMEL Corporation

부품명 AT697F
상세설명  Rad-Hard 32 bit SPARC V8 Processor
PDF  155 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT697F 데이터시트(HTML) 128 Page - ATMEL Corporation

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7703C–AERO–6/09
AT697F ADVANCE INFORMATION
Power “On/Off”
Sequence
The AT697E is based on the Atmel 0.18 µm CMOS process. As VDD (1.8V) and VCC (3.3V)
power supplies are electrically isolated, there is no specified sequence in which the power rails
may be activated or deactivated.
Power
Consumption
The power dissipation is the sum of three basic contributions : P = Pcore + Pio + Ppci
•
Pcore represents the contribute due to the internal activity.
•
Pio represents the contribute due to the IO pads and output load current, except the PCI
bus.
•
Ppci represents the contribute due to the PCI pads and output load current.
The following table gives the estimated current consumption for different conditions. The values
are coming from estimation and calculation and not from real measurement.
Table 125.
Mode
Typical conditions
Worst Conditions
P Core
(1.8V) in W
P I/O
(3.3V) in W
P PCI
(3.3V) in W
P Core
(1.8V) in W
P I/O
(3.3V) in W
P PCI
(3.3V) in W
Operating
(100MHz)
0.6
0.2
0.1
0.8
0.3
0.2
Power Dissipation
Typical conditions : 25°C, 1.8V core, 3.3V I/O, High I/O and core activity
Worst conditions : 125°C, 1.95 V core, 3.6V I/O; High I/O and core activity
In idle mode (100 MHz external clock), the core power consumption is 0.5W in typical conditions
and 0.7W in worst case conditions.
Decoupling
capacitance
Two main frequencies are involved in the AT697 processor environment :
•
33MHz from the PCI interface
•
100MHz from the master clock of the processor (either from PLL or directly from resonator
input)
The following hypothesis is taken for the calculation of the decoupling capacitance :
•
1.5nH is issued from the connection of the capacitor to the PCB
•
1.5nH is issued from the capacitor intrinsic inductance
Figure 50. Capacitor description
capacitor
0.75nH
0.75nH
1.5nH
PCB
This hypothesis corresponds to a capacitor connected to two micro-vias on a PCB.
The filter defined by the self and the decoupling capacitor shall be able to filter the characteristic frequen-
cies of the application. Each frequency to filtre is defined by :
fc
1
2
· π L·C
-------------------
=
•
L : the inductance equivalent to the global inductance on the VSS/VDD (VSS/VCC) line.
•
C : the decoupling capacitance.



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