H5GQ1H24AFR-R0C datasheet(34/173 Pages) HYNIX

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H5GQ1H24AFR-R0C 데이터시트(PDF) 34 Page - Hynix Semiconductor

부품명	H5GQ1H24AFR-R0C

상세설명	1Gb (32Mx32) GDDR5 SGRAM

PDF	173 Pages

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제조업체	HYNIX [Hynix Semiconductor]

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34 / 173 page

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsability for use of circuits described. No patent licenses are implied.

Rev. 1.0 /Nov. 2009

H5GQ1H24AFR

LDFF loads the DBI FIFO regardless of the WDBI and RDBI Mode Register bits. It also loads the EDC FIFO

regardless of the WRCRC and RDCRC Mode Register bits, and no CRC is calculated; however, RDBI and

RDCRC must be enabled to read the DBI and EDC bits, respectively, with the RDTR command.

Figure 17: LDFF Command

CS#

WE#

CAS#

RAS#

CKE#

LOW

LDFF

CK#

A9, BA3

A1, A3

A8,A10,A11

BA0‐BA2

A2, A4,A5

0,0,1

A0,A7,A6

DATA

DATA = FIFO data

BP = Burst Position

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