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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MPC8309EC 데이터시트(PDF) 66 Page - Freescale Semiconductor, Inc |
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MPC8309EC 데이터시트(HTML) 66 Page - Freescale Semiconductor, Inc |
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66 / 82 page  MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0 66 Freescale Semiconductor Clocking 23 Clocking Figure 45 shows the internal distribution of clocks within the MPC8309. Figure 45. MPC8309 Clock Subsystem The primary clock source for the MPC8309 can be one of three inputs,Crystal(SYS_XTAL_IN ), SYS_CLK_IN or PCI_SYNC_IN, depending on whether the device is configured in PCI host or PCI agent mode, respectively. Core PLL System LBC LCLK[0:1] core_clk e300c3 core csb_clk Local Bus Clock Unit of the device lbc_clk Memory Device /n Clock MEMC_MCK MEMC_MCK DDR ddr_clk DDR Memory Device PLL to DDR memory controller Clock /2 Divider Divider QE PLL CLK Gen QE Block qe_clk QE_CLK_IN PCI Clock Divider csb_clk to rest to local bus CFG_CLKIN_DIV PCI_SYNC_OUT PCI_CLK[0:2] PCI_SYNC_IN /n MPC8309 Rest of the System SYS_XTAL_OUT SYS_XTAL_IN SYS_CLK_IN CRYSTAL |
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