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COP8SE 데이터시트(PDF) 22 Page - National Semiconductor (TI) |
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COP8SE 데이터시트(HTML) 22 Page - National Semiconductor (TI) |
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22 / 47 page ![]() 7.0 Power Saving Features (Continued) 8.0 Interrupts 8.1 INTRODUCTION Each device supports eight vectored interrupts. Interrupt sources include Timer 0, Timer 1, EERAM Write Complete, Port L Wakeup, Software Trap, MICROWIRE/PLUS, and Ex- ternal Input. All interrupts force a branch to location 00FF Hex in program memory. The VIS instruction may be used to vector to the appropriate service routine from location 00FF Hex. The Software trap has the highest priority while the default VIS has the lowest priority. Each of the 7 maskable inputs has a fixed arbitration ranking and vector. Figure 18 shows the Interrupt Block Diagram. DS100973-27 FIGURE 17. Multi-Input Wake Up Logic DS100973-28 FIGURE 18. Interrupt Block Diagram www.national.com 22 |
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