HCS08 datasheet(217/290 Pages) MOTOROLA

217 / 290 page

Data Sheet — MC9S08GB60/D V1.5

MOTOROLA

217

MC9S08GB/GT

13.5.3 IIC Control Register (IICC)

Figure 13-7 IIC Control Register (IICC)

IICEN — IIC Enable

The IICEN bit determines whether the IIC module is enabled.

1 = IIC is enabled.

0 = IIC is not enabled.

IICIE — IIC Interrupt Enable

The IICIE bit determines whether an IIC interrupt is requested.

1 = IIC interrupt request enabled.

0 = IIC interrupt request not enabled.

MST — Master Mode Select

The MST bit is changed from a 0 to a 1 when a START signal is generated on the bus and master mode

is selected. When this bit changes from a 1 to a 0 a STOP signal is generated and the mode of operation

changes from master to slave.

1 = Master Mode.

0 = Slave Mode.

1280

129

1536

129

112

1792

257

128

2048

257

144

2304

385

160

2560

385

192

3072

513

240

3840

513

Bit 7

654321

Bit 0

Read:

IICEN

IICIE

MST

TXAK

000

Write:

RSTA

Reset:

00000000

= Unimplemented or Reserved

Table 13-3 IIC Divider and Hold Values (Continued)

ICR

(hex)

SCL Divider

SDA Hold

Value

ICR

(hex)

SCL Divider

SDA Hold

Value

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