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WM8944BECS/R 데이터시트(PDF) 45 Page - Cirrus Logic

부품명 WM8944BECS/R
상세설명  Mono Low-Power CODEC with Video Buffer
PDF  165 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8944BECS/R 데이터시트(HTML) 45 Page - Cirrus Logic

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WM8944B
Rev 4.3
45
DYNAMIC CHARACTERISTICS
The dynamic behaviour determines how quickly the DRC responds to changing signal levels. Note
that the DRC responds to the peak signal amplitude over a period of time.
The DRC_ATK determines how quickly the DRC gain decreases when the signal amplitude is high.
The DRC_DCY determines how quickly the DRC gain increases when the signal amplitude is low.
These register fields are described in Table 21. Note that the register defaults are suitable for general
purpose microphone use.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R31 (1Fh)
DRC Control 3
7:4
DRC_ATK [3:0]
0100
Attack rate relative to the input
signal (seconds/6dB)
0000 = Reserved
0001 = 181us
0010 = 363us
0011 = 726us
0100 = 1.45ms
0101 = 2.9ms
0110 = 5.8ms
0111 = 11.6ms
1000 = 23.2ms
1001 = 46.4ms
1010 = 92.8ms
1011 = 185.6ms
1100-1111 = Reserved
3:0
DRC_DCY [3:0]
0010
Decay rate relative to the input
signal (seconds/6dB)
0000 = 186ms
0001 = 372ms
0010 = 743ms
0011 = 1.49s
0100 = 2.97s
0101 = 5.94s
0110 = 11.89s
0111 = 23.78s
1000 = 47.56s
1001-1111 = Reserved
Table 21 DRC Time Constants
Under the following conditions, it is possible to predict the attack times with an input sine wave:
Decay rate is set at least 8 times the attack rate.
Attack time * input frequency > 1
To estimate the attack time for 10%-90%:
Attack Time = Register Value * 2.24
For example, if DRC_ATK = 1.45ms/6dB, then the attack time (10%-90%) = 1.45ms * 2.24 = 3.25ms.
The decay time for 10%-90% can be estimated using the graph in Figure 17.



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