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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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WM8944BECS/R 데이터시트(PDF) 24 Page - Cirrus Logic |
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WM8944BECS/R 데이터시트(HTML) 24 Page - Cirrus Logic |
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24 / 165 page  WM8944B 24 Rev 4.3 INPUT PGA GAIN CONTROL The volume control gain for the PGA is adjusted using the INPGA_VOL register field as described in Table 4. The gain range is -12dB to +35.25dB in 0.75dB steps. The gains on the inverting and non- inverting inputs to the PGA are always equal. The input PGA can be muted using the INPGA_MUTE mute bit. To prevent "zipper noise", a zero-cross function is provided on the input PGA. When this feature is enabled, volume updates will not take place until a zero-crossing is detected. The Input PGA volume control register fields are described in Table 4. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R40 (28h) Input PGA gain ctrl 7 INPGA_ZC 0 Input PGA Zero Cross Detector 0 = Change gain immediately 1 = Change gain on zero cross only 6 INPGA_MUTE 1 Input PGA Mute 0 = Disable Mute 1 = Enable Mute 5:0 INPGA_VOL [5:0] 01_0000 (0dB) Input PGA Volume 00_0000 = -12dB 00_0001 = -11.25dB … 01_0000 = 0dB ... 11_1111 = +35.25 (See Table 5 for volume range) Table 4 Input PGA Volume Control |
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