WM8944BECSSLASHR datasheet(66/165 Pages) CIRRUS

66 / 165 page

WM8944B

Rev 4.3

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R42 (2Ah)

Output ctrl

SPKN_DISCH

Discharges SPKOUTN output via

approx 550 ohm resistor

0 = Not active

1 = Actively discharging SPKOUTN

SPKP_DISCH

Discharges SPKOUTP output via

approx 550 ohm resistor

0 = Not active

1 = Actively discharging SPKOUTP

LINE_DISCH

Discharges LINEOUT output via

approx 550 ohm resistor

0 = Not active

1 = Actively discharging LINEOUT

Table 43 Output Discharge Control

DIGITAL AUDIO INTERFACE

The digital audio interface is used for inputting DAC data into the WM8944B and outputting ADC data

from it. It uses four pins:



ADCDAT - ADC / Digital Microphone data output



DACDAT - DAC data input



LRCLK - DAC and ADC data alignment clock



BCLK - Bit clock, for synchronisation

MASTER AND SLAVE MODE OPERATION

The digital audio interface can be configured as a Master or a Slave interface, using the MSTR

WM8944B

ADCDAT

LRCLK

DACDAT

BCLK

Processor

WM8944B

Processor

ADCDAT

LRCLK

DACDAT

BCLK

Figure 19 Master Mode

Figure 20 Slave Mode

In Master mode, LRCLK and BCLK are configured as outputs, and the WM8944B controls the timing

of the data transfer on the ADCDAT and DACDAT pins.

In Master mode, the LRCLK frequency is determined automatically according to the sample rate (see

“Clocking and Sample Rates”). The BCLK frequency is set by the BCLK_DIV register. BCLK_DIV

must be set to an appropriate value to ensure that there are sufficient BCLK cycles to transfer the

complete data words from the ADCs and to the DACs.

In Slave mode, LRCLK and BCLK are configured as inputs, and the data timing is controlled by an

external master.

WM8944BECS/R 데이터시트(PDF) 66 Page - Cirrus Logic

WM8944BECS/R 데이터시트(HTML) 66 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL