L6986I_V01 datasheet(33/60 Pages) STMICROELECTRONICS

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The L6986I normally operates in the MASTER mode, driving the SYNCH line at the selected oscillator frequency

as shown in Figure 39 and Figure 40.

In the SLAVE mode the L6986I sets the internal oscillator at 250 kHz typ. (see Table 6) and drives the line

accordingly.

Figure 39. L6986I synchronization driving capability

In order to safely guarantee that each regulator recognizes itself in SLAVE mode when synchronized, the external

master must drive the SYNCH pin with a clock signal frequency higher than the maximum oscillator spread of the

selected line in Table 6 for at least 10 internal clock cycles.

Example 1: selecting RFSW = 0 Ω to VCC

Table 9. Example of oscillator frequency selection

Symbol

RVCC (E24 series

RGND (E24 series)

fSW min.

fSW typ.

fSW max.

fSW

0 Ω

225

250

275

the device enters in slave mode after 10 pulses at frequency higher than 275 kHz

As anticipated above, in SLAVE mode the internal oscillator operates at 250 kHz typ. but the slope compensation

is dimensioned accordingly with FSW resistors so it is important to limit the switching operation around a working

point close to the selected oscillator frequency (FSW resistor).

As a consequence, to guarantee the full output current capability and to prevent the subharmonic oscillations, the

master may limit the driving frequency range within ± 5% of the selected frequency.

A wider frequency range may generate subharmonic oscillation for duty > 50% or limit the peak current capability

(see IPK parameter in section 3) since the internal slope compensation signal may be saturated.

The device keeps operating in slave mode as far as the master is able to drive the SYNCH pin faster than 275

kHz, otherwise the L6986I goes back into MASTER mode at the programmed RFSW oscillator frequency after

successfully driving one pulse 250 kHz typ. (see Figure 40) in the SYNCH line.

L6986I

Synchronization

DS13647 - Rev 2

page 33/60

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