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CC1110-RTR1 데이터시트(PDF) 175 Page - Texas Instruments

부품명 CC1110-RTR1
상세설명  True System-on-Chip with Low Power RF Transceiver and 8051 MCU
PDF  203 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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CC1110-RTR1 데이터시트(HTML) 175 Page - Texas Instruments

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CC1110
CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A
Page 175 of 202
0xDF00: SYNC1 – Sync word, high byte
Bit
Field Name
Reset
R/W
Description
7:0
SYNC[15:8]
0xD3
R/W
8 MSB of 16-bit sync word
0xDF01: SYNC0 – Sync word, low byte
Bit
Field Name
Reset
R/W
Description
7:0
SYNC[7:0]
0x91
R/W
8 LSB of 16-bit sync word
0xDF02: PKTLEN – Packet length
Bit
Field Name
Reset
R/W
Description
7:0
PACKET_LENGTH
0xFF
R/W
Indicates the packet length when fixed length
packets are enabled. If variable length packets are
used, this value indicates the maximum length
packets allowed.
0xDF03: PKTCTRL1 – Packet automation control
Bit
Field Name
Reset
R/W
Description
7:5
PQT[2:0]
000
R/W
Preamble quality estimator threshold. The preamble quality
estimator increases an internal counter by one each time a bit is
received that is different from the previous bit, and decreases the
counter by 4 each time a bit is received that is the same as the
last bit. The counter saturates at 0 and 31.
A threshold of 4·PQT for this counter is used to gate sync word
detection. When PQT=0 a sync word is always accepted.
4:3
-
00
R0
Reserved
2
APPEND_STATUS
1
R/W
When enabled, two status bytes will be appended to the payload
of the packet. The status bytes contain RSSI and LQI values, as
well as the CRC OK flag.
1:0
ADR_CHK[1:0]
00
R/W
Controls address check configuration of received packages.
Setting
Address check configuration
0 (00)
No address check
1 (01)
Address check, no broadcast
2 (10)
Address check, 0 (0x00) broadcast
3 (11)
Address check, 0 (0x00) and 255 (0xFF) broadcast



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