| 전자부품 데이터시트 검색엔진 |
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PIFE32251B-R47MS 데이터시트(PDF) 20 Page - Texas Instruments |
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PIFE32251B-R47MS 데이터시트(HTML) 20 Page - Texas Instruments |
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20 / 96 page ![]() 20 TPS65094 SWCS133C – SEPTEMBER 2015 – REVISED FEBRUARY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TPS65094 Specifications Copyright © 2015–2019, Texas Instruments Incorporated Electrical Characteristics: Synchronous Buck Converters (continued) over recommended input voltage range, TA = –40°C to +85°C and TA = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT BUCK5 VIN Power input voltage 4.5 5 5.5 V VOUT DC output voltage Step size 10 mV BUCK5_VID[6:0] = 0000000 0 V BUCK5_VID[6:0] = 0000001 0.5 BUCK5_VID[6:0] = 0000010 0.51 ⋮ ⋮ BUCK5_VID[6:0] = 1001011 (default) 1.24 ⋮ ⋮ BUCK5_VID[6:0] = 1110101 1.66 BUCK4_VID[6:0] = 1110110–1111111 1.67 DC output voltage accuracy VOUT = 1.24 V, IOUT = 1.5 A –2% 2% VOUT = 1.24 V, IOUT = 100 mA –2.5% 2.5% IOUT Continuous DC output current 3.2 A IIND_LIM HSD FET current limit 4.3 7 A IQ Quiescent current VIN = 5 V, VOUT = 1.24 V 35 µA ΔVOUT/ΔVIN Line regulation VOUT = 1.24 V, IOUT = 1.5 A –0.5% 0.5% ΔVOUT/ΔIOUT Load regulation VIN = 5 V, VOUT = 1.24 V, IOUT = 0 A to 1.5 A, referenced to VOUT at IOUT = 0.75 A –0.2% 1% ΔVOUT_TR (1) Load transient regulation DC + AC at sense point, VIN = 5 V, VOUT = 1.24 V, IOUT = 0.45 A to 1.5 A and 1.5 A to 0.45 A with slew rate of 2.5 A/µs –5% 5% VTH_PG Power Good deassertion threshold in percentage of target VOUT VOUT rising 108% VOUT falling 92% VTH_HYS_PG Power Good reassertion hysteresis entering back into VTH_PG VOUT rising or falling 3 LSW Output inductance 0.376 0.47 0.564 µH CIN Input bypass capacitance 2.5 10 12 µF COUT Output filtering capacitance 31 44 110 µF RDIS Output auto-discharge resistance BUCK5_DIS[1:0] = 01 100 Ω BUCK5_DIS[1:0] = 10 200 BUCK5_DIS[1:0] = 11 500 |
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