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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIFE32251B-R47MS 데이터시트(PDF) 60 Page - Texas Instruments |
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PIFE32251B-R47MS 데이터시트(HTML) 60 Page - Texas Instruments |
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60 / 96 page  60 TPS65094 SWCS133C – SEPTEMBER 2015 – REVISED FEBRUARY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TPS65094 Detailed Description Copyright © 2015–2019, Texas Instruments Incorporated 6.6.16 POK_DELAY: PCH_PWROK Delay Register (offset = 43h) [reset = 0000 0111] Programmable Power Good delay for PCH_PWROK pin, measured from the moment when all VRs reach the regulation range to Power Good assertion. Figure 6-34. POK_DELAY Register (Offset = 43h) [reset = 0000 0111] Bit 7 6 5 4 3 2 1 0 Bit Name RESERVED RESERVED RESERVED RESERVED RESERVED PWROKDELAY [2] PWROKDELAY [1] PWROKDELAY [0] TPS65094x 0 0 0 0 0 1 1 1 Access R R R R R R/W R/W R/W LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 6-27. POK_DELAY Register Field Descriptions Bit Field Type Reset Description 2–0 PWROKDELAY[2:0] R/W 111 Programmable delay measured from the moment all rails have reached regulation voltage to assertion of PCH_PWROK. All values have ±10% variation. 000 = 2.5 ms 001 = 5.0 ms 010 = 10 ms 011 = 15 ms 100 = 20 ms 101 = 50 ms 110 = 75 ms 111 = 100 ms (default) 6.6.17 FORCESHUTDN: Force Emergency Shutdown Control Register (offset = 91h) [reset = 0000 0000] Figure 6-35. FORCESHUTDN Register (offset = 91h) [reset = 0000 0000] Bit 7 6 5 4 3 2 1 0 Bit Name RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED SDWN TPS65094x 0 0 0 0 0 0 0 0 Access R R R R R R R R/W LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 6-28. FORCESHUTDN Register Field Descriptions Bit Field Type Reset Description 0 SDWN R/W 0 Forces reset of the PMIC. The bit is self-clearing. 0 = No action 1 = PMIC is forced to shut down. 6.6.18 BUCK4VID: BUCK4 VID Register (offset = 94h) [reset = 0010 1111] Figure 6-36. BUCK4VID Register (offset = 94h) [reset = 0010 1111] Bit 7 6 5 4 3 2 1 0 Bit Name RESERVED BUCK4_VID[6] BUCK4_VID[5] BUCK4_VID[4] BUCK4_VID[3] BUCK4_VID[2] BUCK4_VID[1] BUCK4_VID[0] TPS65094x 0 0 1 0 1 1 1 1 Access R/W R/W R/W R/W R/W R/W R/W R/W LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 6-29. BUCK4VID Register Field Descriptions Bit Field Type Reset Description 6–0 BUCK4_VID[6:0] R/W 0101111 (1.80 V) This field sets the BUCK4 regulator output regulation voltage in normal mode. Default = 1.80 V. Note that 0 V is a valid setting and all Power Goods must stay high when VID is set to 0x00. See Table 6-4 for full details. |
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