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PIFE32251B-R47MS 데이터시트(PDF) 48 Page - Texas Instruments |
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PIFE32251B-R47MS 데이터시트(HTML) 48 Page - Texas Instruments |
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48 / 96 page ![]() LDOAx SWx RSMRSTB PCH_PWROK 444 ns (nominal with ±1% variation) VSYS BUCKx VTT 5.4 V 48 TPS65094 SWCS133C – SEPTEMBER 2015 – REVISED FEBRUARY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TPS65094 Detailed Description Copyright © 2015–2019, Texas Instruments Incorporated 6.3.5.6 Emergency Shutdown When VSYS crosses below VSYS_UVLO_5V, all Power Good pins are deasserted; after 444 ns (nominal) of delay, all VRs shut down (see Figure 6-12). Upon shutdown, all internal discharge resistors are set to 100 Ω to ensure timely decay of all VR outputs. VSYS crossing above VSYS_UVLO_5V + VSYS_UVLO_5V_HYS and assertion of PMICEN is required to re-enable the VRs. Other conditions that cause emergency shutdown are the following: • The die temperature rising above the critical temperature threshold (TCRIT) • Falling edge of THERMTRIPB • Deassertion of Power Good of any rail or failure to reach power good within 10 ms of enable (configurable) Figure 6-12. Emergency Shutdown Sequence |
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