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HC705CT4GRS/D 데이터시트(PDF) 50 Page - NXP Semiconductors

부품명 HC705CT4GRS/D
상세설명  General Release Specification
PDF  152 Pages
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Operating Modes
General Release Specification
MC68HC705CT4 — Rev. 2.0
50
Operating Modes
MOTOROLA
6.3 Single-Chip Mode
In single-chip mode, the address and data buses are not available
externally, but there are three 8-bit input/output (I/O) ports and one 7-bit
I/O port. This mode allows the MCU to function as a self-contained
microcontroller, with maximum use of the pins for on-chip peripheral
functions. All address and data activity occurs within the MCU. Single-
chip mode is entered on the rising edge of RESET if the IRQ/VPP pin is
within normal operating range.
Figure 6-1. Single-Chip Mode Pinout of the MC68HC705CT4
34
39
PC3
PC4
PC5
PC6
PC7/PWM
PD3/CMP2–
29
PD2/CMP12+
7
12
PA3
PA2
PA1
PA0
PB0
PB1
PB2
PB3
PB4
17
PB5
PB6
18
23
28
640
1
PD6/TCMP
PD5/SCK
PD4/SDIO
TCAP
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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