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HC705CT4GRS/D 데이터시트(PDF) 97 Page - NXP Semiconductors |
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HC705CT4GRS/D 데이터시트(HTML) 97 Page - NXP Semiconductors |
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97 / 152 page ![]() Pulse Width Modulator (PWM) PWM During Wait Mode MC68HC705CT4 — Rev. 2.0 General Release Specification MOTOROLA Pulse Width Modulator (PWM) 97 12.5 PWM During Wait Mode The PWM continues normal operation during wait mode. To decrease power consumption during WAIT, it is recommended that the PWME bit in the miscellaneous control register be cleared if the PWM D/A converter is not being used. 12.6 PWM During Stop Mode In stop mode, the oscillator is stopped, causing the PWM to cease function. Any signal in process is halted in whatever phase the signal happens to be in. Disabling the PWM before executing the STOP instruction is recommended. 12.7 PWM During Reset Upon reset the PWME bit is cleared. In effect, this disables the PWM system and configures the PC7/PWM pin as a high impedance port C input pin. The user should write to the data register prior to enabling the PWM system (for instance, prior to setting PWME). This avoids an erroneous duty cycle from being driven. 12.8 PWM Power Supply Source The PWM is supplied by VDD and VSS, due to the noise generated by the digital circuitry, since this module is not affected by supply noise. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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