 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
HC705CT4GRS/D 데이터시트(PDF) 52 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
HC705CT4GRS/D 데이터시트(HTML) 52 Page - NXP Semiconductors |
|
|
52 / 152 page  Operating Modes General Release Specification MC68HC705CT4 — Rev. 2.0 52 Operating Modes MOTOROLA 6.5.3 Wait Mode The WAIT instruction places the MCU in a low power-consumption mode, but the wait mode consumes more power than the stop mode. All CPU action is suspended, but the core timer, the oscillator, and any enabled module remain active. Any interrupt or reset will cause the MCU to exit the wait mode. The user must shut off subsystems to reduce power consumption. WAIT current specifications assume CPU operation only and do not include current consumption by any other subsystems. Figure 6-2. Stop Recovery Timing Diagram 1FFE 1FFE 1FFE 1FFE 1FFF INTERNAL ADDRESS BUS INTERNAL CLOCK IRQ/VPP 3 IRQ/VPP 2 RESET OSC1 1 t ILCH 4064 tcyc RESET OR INTERRUPT VECTOR FETCH t LIH t RL NOTES: 1. Represents the internal gating of the OSC1 pin 2. IRQ/VPP pin edge-sensitive mask option 3. IRQ/VPP pin level- and edge-sensitive mask option Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
