HC705CT4GRSSLASHD datasheet(51/152 Pages) NXP

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Operating Modes

Bootloader Mode

MC68HC705CT4 — Rev. 2.0

General Release Specification

MOTOROLA

Operating Modes

6.4 Bootloader Mode

Bootloader mode is entered upon the rising edge of RESET if the IRQ is

at VTST and the PB1 pin is at logic one. The bootloader code resides in

the ROM from $1F01 to $1FEF. This program handles copying of user

code from an external EPROM into the on-chip EPROM. The bootload

function does not have to be done from an external EPROM, but it may

be done from a host. (See Section 15. EPROM.)

6.5 Low-Power Modes

The following paragraphs describe the low-power modes.

6.5.1 Stop Mode

The STOP instruction places the MCU in its lowest power-consumption

mode. In stop mode, the internal oscillator is turned off, halting all

internal processing, including timer operation.

During stop mode, the CTCSR ($08) bits are altered to remove any

pending timer interrupt request and to disable any further timer

interrupts. The timer prescaler is cleared. The I bit in the CCR is cleared

to enable external interrupts. All other registers and memory remain

unaltered. All input/output lines remain unchanged. The processor can

be brought out of stop mode only by an external interrupt or reset.

6.5.2 Stop Recovery

The processor can be brought out of the stop mode only by an external

interrupt or RESET. See Figure 6-2.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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