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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HC705CT4GRS/D 데이터시트(PDF) 67 Page - NXP Semiconductors |
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HC705CT4GRS/D 데이터시트(HTML) 67 Page - NXP Semiconductors |
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67 / 152 page  16-Bit Timer Timer During Stop Mode MC68HC705CT4 — Rev. 2.0 General Release Specification MOTOROLA 16-Bit Timer 67 8.9 Timer During Stop Mode In stop mode, the timer stops counting and holds the last count value if stop is exited by an interrupt. If reset is used, the counter is forced to $FFFC. During stop, if the timer is on and at least one valid input capture edge occurs at the TCAP pin, the input capture detect circuit is armed. This does not set any timer flags or wake up the MCU. When the MCU does wake up, however, there is an active input capture flag and data from the first valid edge that occurred during the stop mode. If reset is used to exit stop mode, no input capture flag or data remains, even if a valid input capture edge occurred. 8.10 Timer Power Supply Source The timer’s power is supplied by VDD and VSS. VDD2 and VSS2 will not be needed since this module is not susceptible to supply noise. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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