HC705CT4GRSSLASHD datasheet(65/152 Pages) NXP

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16-Bit Timer

Timer Status Register

MC68HC705CT4 — Rev. 2.0

General Release Specification

MOTOROLA

16-Bit Timer

OLVL — Output Level

Value of output level is clocked into the output level register by the

next successful output compare and will appear on the TCMP pin.

1 = High output

0 = Low output

8.7 Timer Status Register

The TSR is a read-only register containing three status flag bits.

ICF — Input Capture Flag

1 = Flag set when selected polarity edge is sensed by input capture

edge detector

0 = Flag cleared when TSR and input capture low register ($15) are

accessed

Reset clears this bit.

OCF — Output Compare Flag

1 = Flag set when output compare register contents match the free-

running counter contents

0 = Flag cleared when TSR and output compare low register ($17)

are accessed

Reset clears this bit.

Address:

$0013

Bit 7

654321

Bit 0

Read:

ICF

OCF

TOF

00000

Write:

Reset:

00000000

= Unimplemented

Figure 8-3. Timer Status Register (TSR)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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