| 전자부품 데이터시트 검색엔진 |
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TIR2000 데이터시트(PDF) 23 Page - Texas Instruments |
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TIR2000 데이터시트(HTML) 23 Page - Texas Instruments |
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23 / 63 page ![]() 2–11 • Write the LCR register so that bit LCR[7] = 0 (for normal operation). 4. Program the IER register to enable only the receive related interrupts. 5. Write a 1 to the ACREG[6] bit to enable data receive. 6. Write a 1 to the MCR[3] bit to enable the selected IRQ channel. This completes the programming of registers for data receive and now the device is ready to receive data. The CPU receives an interrupt and reads the IIR to identify the source of the interrupt. If the source of the interrupt is IIR[0] the CPU goes into the threshold mode. See paragraph 2.1.1.2.1. If the source of the interrupt is IIR[4] there has been an overrun while data receiving and the CPU needs to service the overrun. See paragraph 2.1.1.2.3. 2.1.5 TV mode The consumer TV remote-control (TV) mode supports data transmission between devices at a speed of up to 166.7 Kbps. Data can be transferred in a half-duplex mode. The following registers need to be programmed: 1. Program the interrupt configuration register (ICR) in order to: • Select the IRQ channel. • Select either totem-pole or open-drain output. • Select an active high or an active low for an interrupt when the totem-pole configuration is selected. 2. Program the prescaler (PRESC) register. The PRESC register can be programmed to a value so that: X IN PRESC v 5MHz Where X IN + Input clock frequency and PRESC + PRESC register value (3) For a 48-MHz input clock, a PRESC register value of larger than 0A (hex) is recommended. The default hex value is 1A. This default value is retained if the desired baud rate is under 115.2 Kbps. 3. Program the auxiliary baud-rate divisor lower byte (ABDL) and the auxiliary baud-rate divisor higher byte (ABDH) registers to select the desired communication baud rate for TV mode. The baud rate is determined by: Baud rate + X IN PRESC Divisor 16 Divisor + X IN PRESC BaudRate 16 å (4) The two 8-bit auxiliary baud-rate divisor registers store the divisor in a 16-bit binary format. 4. Program the mode-definition register (MDR) in order to: • Select the TV mode • Enable/disable the low-power mode. For normal operation, the low-power mode is enabled. |
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