| 전자부품 데이터시트 검색엔진 |
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TIR2000 데이터시트(PDF) 3 Page - Texas Instruments |
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TIR2000 데이터시트(HTML) 3 Page - Texas Instruments |
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3 / 63 page ![]() iii Contents Section Title Page 1 Introduction 1–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Features 1–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Functional Block Diagram 1–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Terminal Assignments 1–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Ordering Information 1–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Terminal Functions 1–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional Description 2–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Modes of Operation 2–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.1 Fast-Speed Infrared (FIR) mode (IrDA 1.1) 2–2 . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.2 Medium-Speed Infrared (MIR) mode (IrDA 1.1) 2–5 . . . . . . . . . . . . . . . . . . . . . . 2.1.3 Slow-Speed Infrared (SIR) mode (IrDA 1.0) 2–8 . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.4 SHARP Infrared (IR) mode 2–9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.5 TV mode 2–11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.6 Universal Asynchronous Receiver Transmitter (UART) mode 2–13 . . . . . . . . . 2.1.7 DMA Operation 2–17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Register Definitions for the UART, SIR and SHARP Modes 3–1 . . . . . . . . . . . . . . . . . . . . 3.1 Receiver-Buffer Register (RBR) – (read only) 3–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Transmitter Holding Register (THR) – (write only) 3–1 . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Interrupt Enable Register (IER) – (read and write) 3–1 . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Interrupt Identification Register (IIR) - (read only) 3–2 . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 FIFO-Control Register (FCR) – (write only) 3–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 Line-Control Register (LCR) - (read and write) 3–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7 Modem Control Register (MCR) - (read and write) 3–4 . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 Line Status Register (LSR) - (read only) 3–5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.9 Modem Status Register (MSR) - (read only) 3–6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.10 Scratch Register (SCR) - (read and write) 3–6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.11 Baud-Rate Divisor Latch LSB (DLL) - (read and write) 3–6 . . . . . . . . . . . . . . . . . . . . . . 3.12 Baud-Rate Divisor Latch MSB (DLM) - (write only) 3–6 . . . . . . . . . . . . . . . . . . . . . . . . . 4 Register Definitions for the MIR, FIR and TV Modes 4–1 . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 Receiver Buffer Register (RBR) – (read only) 4–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2 Transmitter Holding Register (THR) – (write only) 4–1 . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3 Interrupt Enable Register (IER) – (read and write only) 4–1 . . . . . . . . . . . . . . . . . . . . . . 4.4 Interrupt Identification Register (IIR) – (read only) 4–2 . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 FIFO Control Register (FCR) – (write only) 4–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.6 Line Status Register (LSR) – (read only) 4–5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.7 Auxiliary Baud–Rate Divisor Lower Register (ABDL) – (write only) 4–6 . . . . . . . . . . . . 4.8 Auxiliary Baud–Rate Divisor Higher Register (ABDH) – (write only) 4–6 . . . . . . . . . . . 4.9 Mode Definition Register (MDR) – (read and write) 4–6 . . . . . . . . . . . . . . . . . . . . . . . . . 4.9.1 Sleep Mode 4–7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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