DSP56362AD datasheet(65/168 Pages) MOTOROLA

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Specifications

External Memory Expansion Port (Port A)

MOTOROLA

DSP56362 Advance Information

2-27

139 CAS deassertion pulse width

tCP

1.5

× TC − 4.0

11.0

—

140 Column address valid to CAS assertion

tASC

TC − 4.0

6.0

—

141 CAS assertion to column address not

valid

tCAH

2.5

× TC − 4.0

21.0

—

142 Last column address valid to RAS

deassertion

tRAL

× TC − 4.0

36.0

—

143 WR deassertion to CAS assertion

tRCS

100 MHz:

1.25

× TC − 4.0

8.5

144 CAS deassertion to WR assertion

tRCH

100 MHz:

0.75

× TC − 4.0

3.5

145 CAS assertion to WR deassertion

tWCH

2.25

× TC − 4.2 18.3

—

146 WR assertion pulse width

tWP

3.5

× TC − 4.5

30.5

—

147 Last WR assertion to RAS deassertion

tRWL

3.75

× TC − 4.3 33.2

—

148 WR assertion to CAS deassertion

tCWL

3.25

× TC − 4.3 28.2

—

149 Data valid to CAS assertion (write)

tDS

0.5

× TC − 4.0

1.0

—

150 CAS assertion to data not valid (write)

tDH

2.5

× TC − 4.0

21.0

—

151 WR assertion to CAS assertion

tWCS

1.25

× TC − 4.3

8.2

—

152 Last RD assertion to RAS deassertion

tROH

3.5

× TC − 4.0

31.0

—

153 RD assertion to data valid

tGA

100 MHz:

2.5

× TC − 7.0

—

18.0

154 RD deassertion to data not valid6

tGZ

0.0

—

155 WR assertion to data active

0.75

× TC − 0.3

7.2

—

156 WR deassertion to data high

impedance

0.25

× TC

—2.5

Notes:

The number of wait states for Page mode access is specified in the DCR.

The refresh period is specified in the DCR.

The asynchronous delays specified in the expressions are valid for DSP56362

All the timings are calculated for the worst case. Some of the timings are better for specific

cases (e.g., tPC equals 4 × TC for read-after-read or write-after-write sequences).

BRW[1:0] (DRAM control register bits) defines the number of wait states that should be

inserted in each DRAM out-of page-access.

RD deassertion will always occur after CAS deassertion; therefore, the restricted timing is

tOFF and not tGZ.

Table 2-11 DRAM Page Mode Timings, Three Wait States1, 2, 3 (Continued)

No.

Characteristics

Symbol

Expression

100 MHz

Unit

Min

Max

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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