DSP56362AD datasheet(87/168 Pages) MOTOROLA

87 / 168 page

Specifications

External Memory Expansion Port (Port A)

MOTOROLA

DSP56362 Advance Information

2-49

Figure 2-24 Bus Release Timings Case 2 (BRT Bit in OMR Set)

Table 2-19 Asynchronous Bus Arbitration timing

No.

Characteristics

Expression

100 MHz

Unit

Min

Max

250

BB assertion window from BG

input negation.

2 .5* Tc + 5

—

251

Delay from BB assertion to BG

assertion

2 * Tc + 5

—

Comments:

Bit 13 in the OMR register must be set to enter Asynchro-

nous Arbitration mode

At 100 MHz it is recommended to use Asynchronous Arbi-

tration mode.

If Asynchronous Arbitration mode is active, none of the tim-

ings in

Table 2-19 is required.

In order to guarantee timings 250, and 251, it is recommend-

ed to assert BG inputs to different 56300 devices (on the

same bus) in a non overlap manner as shown in

Figure

2-25.

A0–A17

AA0–AA3

CLKOUT

RD, WR

223

218

219

214

212

213

221

224

AA0483

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

DSP56362AD 데이터시트(PDF) 87 Page - Motorola, Inc

DSP56362AD 데이터시트(HTML) 87 Page - Motorola, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL