STA1295 datasheet(53/109 Pages) STMICROELECTRONICS

53 / 109 page

DS12586 Rev 5

53/109

STA1295, STA1275

Package pinouts and signal description

106

DDR_DQ12

—

I/O

DDR_VIO Data line 12

DDR_DQ11

—

I/O

DDR_VIO Data line 11

DDR_DQ10

—

I/O

DDR_VIO Data line 10

DDR_DQ9

—

I/O

DDR_VIO Data line 9

DDR_DQ8

—

I/O

DDR_VIO Data line 8

DDR_DQ7

—

I/O

DDR_VIO Data line 7

DDR_DQ6

—

I/O

DDR_VIO Data line 6

DDR_DQ5

—

I/O

DDR_VIO Data line 5

DDR_DQ4

—

I/O

DDR_VIO Data line 4

DDR_DQ3

—

I/O

DDR_VIO Data line 3

DDR_DQ2

—

I/O

DDR_VIO Data line 2

DDR_DQ1

—

I/O

DDR_VIO Data line 1

DDR_DQ0

—

I/O

DDR_VIO Data line 0

DDR_CKE0

—

DDR_VIO Clock enable rank 0

DDR_CKE1

—

DDR_VIO Clock enable rank 1

DDR_CK

—

DDR_VIO Clock

DDR_CKn

—

DDR_VIO Inverted Clock

DDR_ODT0

—

DDR_VIO Data termination enable rank 0

DDR_ODT1

—

DDR_VIO Data termination enable rank 1

DDR_BA2

—

DDR_VIO Bank address 2

DDR_BA1

—

DDR_VIO Bank address 1

DDR_BA0

—

DDR_VIO Bank address 0

DDR_CS0n

—

DDR_VIO Chip select rank 0

DDR_CS1n

—

DDR_VIO Chip select rank 1

DDR_DM3

—

DDR_VIO Data mask byte 3

DDR_DM2

—

W11

DDR_VIO Data mask byte 2

DDR_DM1

—

DDR_VIO Data mask byte 1

DDR_DM0

—

DDR_VIO Data mask byte 0

DDR_DQS0

—

DDR_VIO Data strobe byte 0

DDR_DQS0n

—

I/O

DDR_VIO Inverted data strobe byte 0

DDR_DQS1

—

I/O

DDR_VIO Data strobe byte 1

DDR_DQS1n

—

I/O

DDR_VIO Inverted data strobe byte 1

DDR_DQS2

—

AC10

I/O

DDR_VIO Data strobe byte 2

DDR_DQS2n

—

AB10

I/O

DDR_VIO Inverted data Strobe byte 2

Table 26. Memory signals (continued)

Name

GPIOs

BALLs DIR

Power

domain

Description

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