STA1295 datasheet(8/109 Pages) STMICROELECTRONICS

8 / 109 page

System description

STA1295, STA1275

8/109

DS12586 Rev 5

2.3

SD/MMC

STA1275 and STA1295 are equipped with 3 SDMMC controllers which allow interfacing to

either mass storage devices, or to WiFi modems.

Two interfaces (SD/MMC1 and 2) implement the following specification:

•

eMMC - MultiMedia Card 4.4

–

26/52 MHz

–

1, 4, 8 bit of data

•

SD/SDIO 3.0

–

4 bit interface

–

SDSC/SDHC/SDXC limited to 50 MHz SDR frequency

Both interfaces can be used in conjunction with DMA to efficiently implement data transfer

with minimal CPU load for handling interrupts.

A third controller (SD/MMCM0) with dedicated DMA engine implementing:

•

eMMC - MultiMedia Card 4.51

–

26/52 MHz

–

1, 4, 8 bit of data

•

SD/SDIO 3.0

–

4 bit interface

–

SDSC/SDHC/SDXC up to SDR50

2.4

USB

STA1275 and STA1295 have two Dual role USB HS controllers, both with embedded PHY,

allowing to efficiently connect to mass storage devices, as well as portable devices (phones,

pads). Along with USB connectivity, STA1275 and STA1295 fully support USB charger

functionality, implementing CDP and SDP profiles from the BC 1.2 specifications. The

controller supports HS 480-Mbps using an EHCI Host Controller, as well as FS and LS

modes through an integrated OHCI interface.

USB controller implements a bootable interface, useful for production flashing, as well as to

debug system post production.

2.5

Display controller

Display controller works simultaneously on multiple layers (up to 4), allowing an on-the-fly

blending composition scheme from multiple frame buffers. Each buffer can have a different

color format, and with each buffer user can specify cropping regions (windowing). A typical

usage example is for blending a complex HMI rendered with 3D engine, on top of a video

frame buffer and a rear-view camera buffer.

The controller can handle two symmetric display panels (only in WVGA mode), sharing the

same data lane, with two separate frame buffer contents.

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