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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DSP56367 데이터시트(PDF) 23 Page - Freescale Semiconductor, Inc |
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DSP56367 데이터시트(HTML) 23 Page - Freescale Semiconductor, Inc |
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23 / 100 page  JTAG/OnCE Interface DSP56367 Technical Data, Rev. 2.1 Freescale Semiconductor 2-19 2.16 JTAG/OnCE Interface Table 2-15 JTAG/OnCE Interface Signal Name Signal Type State during Reset Signal Description TCK Input Input Test Clock—TCK is a test clock input signal used to synchronize the JTAG test logic. It has an internal pull-up resistor. This input is 3.3V tolerant. TDI Input Input Test Data Input—TDI is a test data serial input signal used for test instructions and data. TDI is sampled on the rising edge of TCK and has an internal pull-up resistor. This input is 3.3V tolerant. TDO Output Tri-Stated Test Data Output—TDO is a test data serial output signal used for test instructions and data. TDO is tri-statable and is actively driven in the shift-IR and shift-DR controller states. TDO changes on the falling edge of TCK. TMS Input Input Test Mode Select—TMS is an input signal used to sequence the test controller’s state machine. TMS is sampled on the rising edge of TCK and has an internal pull-up resistor. This input is 3.3V tolerant. |
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