| 전자부품 데이터시트 검색엔진 |
|
DSP56367 데이터시트(PDF) 71 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
DSP56367 데이터시트(HTML) 71 Page - Freescale Semiconductor, Inc |
|
71 / 100 page ![]() Enhanced Serial Audio Interface Timing DSP56367 Technical Data, Rev. 2.1 Freescale Semiconductor 3-47 454 TXC rising edge to data out valid — 23 + 0.5 × TC 21.0 — — 26.5 21.0 x ck i ck ns 455 TXC rising edge to data out high impedance9 —— — — 31.0 16.0 x ck i ck ns 456 TXC rising edge to transmitter #0 drive enable deassertion9 —— — — 34.0 20.0 x ck i ck ns 457 FST input (bl, wr) setup time before TXC falling edge8 —— 2.0 21.0 — — x ck i ck ns 458 FST input (wl) to data out enable from high impedance —— — 27.0 — ns 459 FST input (wl) to transmitter #0 drive enable assertion —— — 31.0 — ns 460 FST input (wl) setup time before TXC falling edge — — 2.0 21.0 — — x ck i ck ns 461 FST input hold time after TXC falling edge — — 4.0 0.0 — — x ck i ck ns 462 Flag output valid after TXC rising edge — — — — 32.0 18.0 x ck i ck ns 463 HCKR/HCKT clock cycle — — 40.0 — ns 464 HCKT input rising edge to TXC output — — — 27.5 ns 465 HCKR input rising edge to RXC output — — — 27.5 ns 1 The timing values calculated are based on simulation data at 150MHz. Tester restrictions limit ESAI testing to lower clock frequencies. 2 ESAI_1 specs match those of ESAI_0. 3 V CC = 1.8 V ± 5%; TJ = –40°C to +95°C, CL = 50 pF 4 i ck = internal clock x ck = external clock i ck a = internal clock, asynchronous mode (asynchronous implies that TXC and RXC are two different clocks) i ck s = internal clock, synchronous mode (synchronous implies that TXC and RXC are the same clock) 5 bl = bit length wl = word length wr = word length relative 6 TXC(SCKT pin) = transmit clock RXC(SCKR pin) = receive clock FST(FST pin) = transmit frame sync FSR(FSR pin) = receive frame sync HCKT(HCKT pin) = transmit high frequency clock HCKR(HCKR pin) = receive high frequency clock 7 For the internal clock, the external clock cycle is defined by Icyc and the ESAI control register. Table 3-19 Enhanced Serial Audio Interface Timing1, 2 (continued) No. Characteristics3, 4, 5 Symbol Expression Min Max Condition6 Unit |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |