68HC05PL4 datasheet(28/98 Pages) FREESCALE

28 / 98 page

GENERAL RELEASE SPECIFICATION

April 30, 1998

INTERRUPTS

MC68HC05PL4

4-4

REV 2.0

4.3

SOFTWARE INTERRUPT

The software interrupt (SWI) instruction causes a non-maskable interrupt.

4.4

EXTERNAL INTERRUPT

The LED/IRQ pin is the source that generates external interrupt. Setting the I bit in

the condition code register or clearing the IRQEN bit in the miscellaneous control/

status register disables this external interrupt.

4.4.1 LED/IRQ Pin

This pin is an open drain pin and setting the IRQEN bit in Miscellaneous Control/

Status Register (MICSR) will set this pin for external interrupt input pin.

An interrupt signal on the LED/IRQ pin latches an external interrupt request. To

help clean up slow edges, the input from the LED/IRQ pin is processed by a

Schmitt trigger gate. When the CPU completes its current instruction, it tests the

IRQ latch. If the IRQ latch is set, the CPU then tests the I bit in the condition code

set, then the CPU begins the interrupt sequence. The CPU clears the IRQ latch

while it fetches the interrupt vector, so that another external interrupt request can

be latched during the interrupt service routine. As soon as the I bit is cleared dur-

ing the return from interrupt, the CPU can recognize the new interrupt request.

Figure 4-3

shows the logic for external interrupts.

The LED/IRQ pin can be negative edge-triggered only or negative edge- and low-

level-triggered. External interrupt sensitivity is programmed with the IRQS bit.

With the edge- and level-sensitive trigger option, a falling edge or a low level on

the LED/IRQ pin latches an external interrupt request. The edge- and level-sensi-

tive trigger option allows connection to the LED/IRQ pin of multiple wired-OR

interrupt sources. As long as any source is holding the LED/IRQ low, an external

interrupt request is present, and the CPU continues to execute the interrupt ser-

vice routine.

With the edge-sensitive-only trigger option, a falling edge on the LED/IRQ pin

latches an external interrupt request. A subsequent interrupt request can be

latched only after the voltage level on the LED/IRQ pin returns to a logic one and

then falls again to logic zero.

NOTE

To use the external interrupt function to exit from WAIT or STOP, it must be

enabled prior entering either of the power saving modes.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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