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68HC05PL4 데이터시트(PDF) 45 Page - Freescale Semiconductor, Inc |
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68HC05PL4 데이터시트(HTML) 45 Page - Freescale Semiconductor, Inc |
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45 / 98 page ![]() April 30, 1998 GENERAL RELEASE SPECIFICATION MC68HC05PL4 INPUT/OUTPUT PORTS REV 2.0 7-1 SECTION 7 INPUT/OUTPUT PORTS This section describes the general purpose I/O ports on the MC68HC05PL4 and MC68HC05PL4B MCUs. In the MC68HC05PL4, 23 bidirectional I/O lines are available, arranged as one 7-bit I/O port (Port A), one 8-bit I/O port (Port B), and one 8-bit I/O port (Port C). In the MC68HC05PL4B, 22 bidirectional I/O lines are available, arranged as one 6-bit I/O port (Port A), one 8-bit I/O port (Port B), and one 8-bit I/O port (Port C). NOTE To avoid generating a glitch on an I/O port pin, data should be written to the I/O port data register before writing a “1” (for output) to the corresponding data direction register. 7.1 PARALLEL PORTS Port A, B, and C are bidirectional ports. Each port pin is controlled by the corresponding bits in a data direction register and a data register as shown in Figure 7-1 . The functions of the I/O pins are summarized in Table 7-1. Figure 7-1. Port Input/Output Circuitry I/O PIN OUTPUT RESET (RST) Read Data Write Data Read/Write DDR Data Direction Register Bit Data Register Bit Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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