68HC05PL4 datasheet(14/98 Pages) FREESCALE

14 / 98 page

GENERAL RELEASE SPECIFICATION

April 30, 1998

GENERAL DESCRIPTION

MC68HC05PL4

1-4

REV 2.0

1.4

PIN DESCRIPTIONS

The following paragraphs give a description of each functional pin.

1.4.1 VDD, VSS

Power is supplied to the MCU using these pins. VDD is the positive supply and

VSS is the ground pin.

1.4.2 OSC1, OSC2

OSC2 is only available on MC68HC05PL4B.

The OSC1 and OSC2 pins are the connections for the on-chip oscillator — the

following con gur ations are available:

1. A crystal or ceramic resonator as shown in Figure 1-4(a).

2. An external clock signal as shown in Figure 1-4(b).

The external oscillator clock frequency, fOSC, is divided by two to produce the

internal operating frequency, fOP.

Figure 1-4. Oscillator Connections

1.4.3 RESET

This active low input-only pin is used to reset the MCU to a known start-up state.

The RESET pin has an Schmitt trigger circuit as part of its input to improve noise

immunity.

1.4.4 LED/IRQ

This pin has two functions, con gured b y the IRQEN bit in the Miscellaneous Con-

trol and Status Register, at $1C (MISCR).

When this pin is IRQ, it drives the asynchronous IRQ interrupt function of the

CPU. The IRQ interrupt function uses the IRQS bit in the MISCR to provide either

only negative edge-sensitive triggering or both negative edge-sensitive and low

level-sensitive triggering. If the MISCR bit is set to enable level-sensitive

MCU

(a) Crystal or

Ceramic Resonator

Connections

OSC1

OSC2

2 MΩ

UNCONNECTED

EXTERNAL CLOCK

Clock Source

Connection

OSC1

OSC2

MCU

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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