68HC05PL4 datasheet(31/98 Pages) FREESCALE

31 / 98 page

April 30, 1998

GENERAL RELEASE SPECIFICATION

MC68HC05PL4

INTERRUPTS

REV 2.0

4-7

4.7

KEYBOARD INTERRUPT

Port B has internal pull-up resistors (typically 100KΩ) and are enabled individually

by setting the corresponding bit in the Pull-Up Enable Register (PUER).

PB0 to PB3 have keyboard interrupt functions, with individual enable and ag bits

in registers $000B and $000C.

A falling edge on any one of the keyboard interrupt pins sets the corresponding

KIF ag in the Keyboard Interrupt Flag Register (KIFR) located at $000C. If the

associated KIE bit in the Keyboard Interrupt Enable Register (KIER) located at

$000B is also set, a keyboard interrupt is generated to the processor.

KIFx can be cleared by writing “1” to the bit. Resets clear both KIFR and KIER.

Keyboard Interrupt can wake up the MCU from WAIT mode or STOP mode.

NOTE

Since the Keyboard Interrupt function is associated with PB0-PB3, any falling

edge on these pins sets the corresponding KIF ag in the K eyboard Interrupt Flag

ups, and KIFR cleared before these port pins switch from I/O to keyboard

application.

To use the keyboard interrupt function to exit from WAIT or STOP, it must be

enabled prior entering either of the power saving modes.

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

PUER

PUL7

PUL6

PUL5

PUL4

PUL3

PUL2

PUL1

PUL0

$000A W

RESET

00000000

Figure 4-5. Pull-Up Enable Register (PUER)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

KIER

KIE3

KIE2

KIE1

KIE0

$000B W

RESET

00000000

Figure 4-6. Keyboard Interrupt Enable Register (KIER)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

KIFR

KIF3

KIF2

KIF1

KIF0

$000C W

RESET

00000000

Figure 4-7. Keyboard Interrupt Flag Register (KIFR)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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