68HC05PL4 datasheet(66/98 Pages) FREESCALE

부품명	68HC05PL4

상세설명	Industry standard 8-bit M68HC05 CPU core

PDF	98 Pages

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제조업체	FREESCALE [Freescale Semiconductor, Inc]

홈페이지	http://www.freescale.com

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66 / 98 page

GENERAL RELEASE SPECIFICATION

April 30, 1998

8-BIT TIMER

MC68HC05PL4

10-4

REV 2.0

10.5

8-BIT TIMER OPERATION DURING WAIT MODE

The CPU clock halts during the WAIT mode, but the timer remains active. If the

interrupts are enabled, the timer interrupt will cause the processor to exit the WAIT

mode.

10.6

8-BIT TIMER OPERATION DURING STOP MODE

The timer ceases counting in STOP mode. When STOP is exited by an external

interrupt or an external reset, the internal oscillator will resume its operation, fol-

lowed by internal processor stabilization delay. The timer is then cleared to zero

and resumes its operation.

NOTE

The T8IF bit in T8CSR will be set after MCU exit from STOP mode. To avoid

generation of the timer 8 interrupt when exiting STOP mode, it is recommended to

clear T8IE bit prior entering STOP mode. After exiting STOP mode T8IF bit must

be cleared before setting T8IE bit.

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68HC05PL4 데이터시트(PDF) 66 Page - Freescale Semiconductor, Inc