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ORSPI4 데이터시트(PDF) 178 Page - Lattice Semiconductor

부품명 ORSPI4
상세설명  Dual SPI4 Interface and High-Speed SERDES FPSC
PDF  263 Pages
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제조업체  LATTICE [Lattice Semiconductor]
홈페이지  http://www.latticesemi.com
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ORSPI4 데이터시트(HTML) 178 Page - Lattice Semiconductor

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ORCA ORSPI4 Data Sheet
178
SPI4 AC Timing
Supported Data Rates
The SPI4 interfaces (SPIA and SPIB) on the ORSPI4 device support the following data rates
Table 58. Supported Data Rates
1 SPI[A,B]_TREFCLK_x8 internal signal is used in quarter-rate mode
SPI4.2 Data Interface
System Timing Reference Points
Figure 90 shows the system timing reference points A and B for the data path timing parameters for both the trans-
mit interface and the receive interface.
Figure 90. System Timing Reference Points.
Figure 91 defines the timing parameters tdia and tdib which show the relationship of TDCLK to TDAT generated by
the ORSPI4 transmit interface. Values of tdia and tdib are given in Table 59.
Figure 91. SPI4.2 Transmit Timing Points with Respect to Clock Edge
Data Rate
Clock
Frequency
(DDR)
Transmit
REFCLK
Frequency
Recommended Operating Mode
500 -900 Mbps
250 - 450 MHz
62.5 - 112.5 MHz
Dynamic
500 -650 Mbps
250 - 325 MHz
62.5 - 81.25 MHz
Static
100 - 200 Mbps
50 - 100 MHz
100 - 200 MHz
1
Quarter-rate static mode
Source
Sink
TDAT[15:0] /
RDAT[15:0}
TCTL/RCTL
TDCLK/RDCLK
AB
TDCLK
TDAT
(A)
Launch Edge
T
dia
T
dib
D
TDCLK



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