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MPC8321EVRADDC 데이터시트(PDF) 27 Page - Freescale Semiconductor, Inc |
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MPC8321EVRADDC 데이터시트(HTML) 27 Page - Freescale Semiconductor, Inc |
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27 / 82 page ![]() MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4 Freescale Semiconductor 27 Local Bus Figure 14 provides the AC test load for the local bus. Figure 14. Local Bus C Test Load LALE output fall to LAD output transition (LATCH hold time) tLBOTOT2 3— ns 6 LALE output fall to LAD output transition (LATCH hold time) tLBOTOT3 2.5 — ns 7 Local bus clock (LCLK n) to output valid tLBKHOV —3 ns 3 Local bus clock (LCLK n) to output high impedance for LAD/LDP tLBKHOZ —4 ns 8 Local bus clock (LCLK n) duty cycle tLBDC 47 53 % — Local bus clock (LCLK n) jitter specification tLBRJ — 400 ps — Delay between the input clock (PCI_SYNC_IN) of local bus output clock (LCLK n) tLBCDL —1.7 ns — Notes: 1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tLBIXKH1 symbolizes local bus timing (LB) for the input (I) to go invalid (X) with respect to the time the tLBK clock reference (K) goes high (H), in this case for clock one(1). 2. All timings are in reference to falling edge of LCLK0 (for all outputs and for LGTA and LUPWAIT inputs) or rising edge of LCLK0 (for all other inputs). 3. All signals are measured from OVDD/2 of the rising/falling edge of LCLK0 to 0.4 × OVDD of the signal in question for 3.3-V signaling levels. 4. Input timings are measured at the pin. 5. tLBOTOT1 should be used when RCWH[LALE] is not set and the load on LALE output pin is at least 10 pF less than the load on LAD output pins. 6. tLBOTOT2 should be used when RCWH[LALE] is set and the load on LALE output pin is at least 10 pF less than the load on LAD output pins. 7. tLBOTOT3 should be used when RCWH[LALE] is set and the load on LALE output pin equals to the load on LAD output pins. 8. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered through the component pin is less than or equal to the leakage current specification. Table 30. Local Bus General Timing Parameters (continued) Parameter Symbol1 Min Max Unit Notes Output Z0 = 50 Ω OVDD/2 RL = 50 Ω |
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