MPC8321EVRADDC datasheet(39/82 Pages) FREESCALE

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MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4

Freescale Semiconductor

IPIC

Figure 29 provides the AC test load for the GPIO.

Figure 29. GPIO AC Test Load

15 IPIC

This section describes the DC and AC electrical specifications for the external interrupt pins of the

MPC8323E.

15.1

IPIC DC Electrical Characteristics

Table 42 provides the DC electrical characteristics for the external interrupt pins of the MPC8323E.

15.2

IPIC AC Timing Specifications

Table 43 provides the IPIC input and output AC timing specifications.

Table 42. IPIC DC Electrical Characteristics1,2

Characteristic

Symbol

Condition

Min

Max

Unit

Input high voltage

VIH

—2.0

OVDD +0.3

Input low voltage

VIL

—

–0.3

0.8

Input current

IIN

——

±5

μA

Output low voltage

VOL

IOL = 6.0 mA

—

0.5

Output low voltage

VOL

IOL = 3.2 mA

—

0.4

Notes:

1. This table applies for pins IRQ[0:7], IRQ_OUT, MCP_OUT, and CE ports Interrupts.

2. IRQ_OUT and MCP_OUT are open drain pins, thus VOH is not relevant for those pins.

Table 43. IPIC Input AC Timing Specifications1

Characteristic

Symbol2

Min

Unit

IPIC inputs—minimum pulse width

tPIWID

Notes:

1. Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN. Timings are

measured at the pin.

2. IPIC inputs and outputs are asynchronous to any visible clock. IPIC outputs should be synchronized before use by any

external synchronous logic. IPIC inputs are required to be valid for at least tPIWID ns to ensure proper operation when working

in edge triggered mode.

Output

Z0 = 50 Ω

OVDD/2

RL = 50 Ω

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