MPC8321EVRADDC datasheet(72/82 Pages) FREESCALE

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MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4

Freescale Semiconductor

Thermal

23.2

Thermal Management Information

For the following sections, PD = (VDD × IDD) + PI/O, where PI/O is the power dissipation of the I/O drivers.

23.2.1

Estimation of Junction Temperature with Junction-to-Ambient

Thermal Resistance

An estimation of the chip junction temperature, TJ, can be obtained from the equation:

TJ = TA + (RθJA × PD)

where:

TJ = junction temperature (°C)

TA = ambient temperature for the package (°C)

RθJA = junction-to-ambient thermal resistance (°C/W)

PD = power dissipation in the package (W)

The junction-to-ambient thermal resistance is an industry standard value that provides a quick and easy

estimation of thermal performance. As a general statement, the value obtained on a single layer board is

appropriate for a tightly packed printed-circuit board. The value obtained on the board with the internal

planes is usually appropriate if the board has low power dissipation and the components are well separated.

Test cases have demonstrated that errors of a factor of two (in the quantity TJ – TA) are possible.

23.2.2

Estimation of Junction Temperature with Junction-to-Board

Thermal Resistance

The thermal performance of a device cannot be adequately predicted from the junction-to-ambient thermal

resistance. The thermal performance of any component is strongly dependent on the power dissipation of

surrounding components. In addition, the ambient temperature varies widely within the application. For

many natural convection and especially closed box applications, the board temperature at the perimeter

Junction-to-package top

Natural convection

ΨJT

2°C/W

Notes:

1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

2. Per JEDEC JESD51-2 with the single layer board horizontal. Board meets JESD51-9 specification.

3. Per JEDEC JESD51-6 with the board horizontal.

4. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on

the top surface of the board near the package.

5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method

1012.1).

6. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature

per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.

Table 64. Package Thermal Characteristics for PBGA (continued)

Characteristic

Board type

Symbol

Value

Unit

Notes

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