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MPC8321EVRADDC 데이터시트(PDF) 68 Page - Freescale Semiconductor, Inc

부품명 MPC8321EVRADDC
상세설명  PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications
PDF  82 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8321EVRADDC 데이터시트(HTML) 68 Page - Freescale Semiconductor, Inc

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MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
68
Freescale Semiconductor
Clocking
shows the expected frequency values for the CSB frequency for select csb_clk to CLKIN/PCI_SYNC_IN
ratios.
Table 59. CSB Frequency Options
CFG_CLKIN_DIV_B
at Reset1
1 CFG_CLKIN_DIV_B is only used for host mode; CLKIN must be tied low and
CFG_CLKIN_DIV_B must be pulled up (high) in agent mode.
SPMF
csb_clk :
Input Clock
Ratio 2
2 CLKIN is the input clock in host mode; PCI_CLK is the input clock in agent mode.
Input Clock Frequency (MHz)2
25
33.33
66.67
csb_clk Frequency (MHz)
High
0010
2 : 1
133
High
0011
3 : 1
100
High
0100
4 : 1
100
133
High
0101
5 : 1
125
High
0110
6 : 1
High
0111
7 : 1
High
1000
8 : 1
High
1001
9 : 1
High
1010
10 : 1
High
1011
11 : 1
High
1100
12 : 1
High
1101
13 : 1
High
1110
14 : 1
High
1111
15 : 1
High
0000
16 : 1
Low
0010
2 : 1
133
Low
0011
3 : 1
100
Low
0100
4 : 1
133
Low
0101
5 : 1
Low
0110
6 : 1
Low
0111
7 : 1
Low
1000
8 : 1
Low
1001
9 : 1
Low
1010
10 : 1
Low
1011
11 : 1
Low
1100
12 : 1
Low
1101
13 : 1
Low
1110
14 : 1
Low
1111
15 : 1
Low
0000
16 : 1



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