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PIFE32251B-R68MS 데이터시트(PDF) 16 Page - Texas Instruments |
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PIFE32251B-R68MS 데이터시트(HTML) 16 Page - Texas Instruments |
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16 / 157 page ![]() 16 TPS650830 SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS650830 Specifications Copyright © 2014–2016, Texas Instruments Incorporated (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 5.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) 1500 V Charged device model (CDM), per JEDEC specification JESD22-C101 (2) 500 V 5.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT CHIP Power input pins: VIN, VINLDO3 -0.3 21 V Analog ground pins: AGND1, AGND2, AGND3, AGND4, AGND (16 center pins) -0.3 0.3 V SWITCHING REGULATORS Input pins - controllers: VINVR3, VINVR5 -0.3 21 V Switch pins - controllers: SWVR1 , SWVR3 , SWVR4 , SWVR5 -1 21 V High drive pins - controllers: DRVHVR1, DRVHVR3, DRVHVR4, DRVHVR5 -0.3 26 V Low drive pins - controllers: DRVLVR1, DRVLVR3, DRVLVR4, DRVLVR5 -0.3 5 V Bootstrap pins - controllers: VBSTVR1, VBSTVR3, VBSTVR4, VBSTVR5 -0.3 26 V Bootstrap pins - controllers: (differential voltage between VBSTVRx and SWVRx) -0.3 5 V Input pin - converter: VINVR2 -0.3 3.3 V Switch pins - Converter: SWVR2 -1 3.3 V Power ground pins: PGNDVR1, PGNDVR2, PGNDVR3, PGNDVR4, PGNDVR5 -0.3 0.3 V Enable pins: ENVR1, ENVR2, ENVR3, ENVR4, ENVR5 -0.3 3.3 V NVDC select pin: NVDC# -0.3 3.3 V Positive remote feedback pins: FBVR1P, FBVR2P, FBVR3P, FBVR4P -0.3 3.3 V Positive remote feedback pin: FBVR5P -0.3 5 V Negative remote feedback pins: FBVR1N, FBVR2N, FBVR3N, FBVR4N, FBVR5N -0.3 0.3 V Gate drive regulator input power pins: VREGVR1, VREGVR2, VREGVR4 -0.3 5 V Low-side current limit: ILIMVR1, ILIMVR3LS, ILIMVR4, ILMVR5LS -0.3 3.3 V High-side current limit: ILMVR3HS, ILMVR5HS -0.3 3.3 V LDO REGULATOR Input pin: VINLDO1 -0.3 3.3 V Output pin: VOUTLDO1 -0.3 1.65 V Power ground pin: PGNDLDO1 -0.3 0.3 V Input feedback pin: VINLDO1S -0.3 3.3 V Output feedback pin: FBLDO1 -0.3 1.65 V I2C SCLK, SDAT, SLAVEADDR -0.3 3.3 V POWERGOOD COMPARATOR LOGIC Powergood (push/pull) supply for input pins: VDDPG -0.3 3.3 V Powergood input voltage sense pins: VSA, VSB, VSC, VSD, VDE, VSF, VSG, VSH -0.3 5 V Powergood enable pins: ENA, ENB, ENC, END, ENE, ENF, ENG, ENH -0.3 3.3 V Powergood output pins: PGA, PGB, PGC, PGD, PGE, PGF, PGG, PGH, PGVR1, PGVR2, PGVR3, PGVR4, PGVR5 -0.3 3.3 V POWERGOOD TREE LOGIC Open-drain outputs: DPWROK, RSMRSTZ_PWRGD, VCCST_PGOOD, SYS_PWROK, ALL_SYS_PWRGD, PCH_PWROK -0.3 3.3 V DDR CONTROL Input pins: DDR_VTT_CTRL, DDRID -0.3 3.3 V |
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