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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIFE32251B-R68MS 데이터시트(PDF) 90 Page - Texas Instruments |
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PIFE32251B-R68MS 데이터시트(HTML) 90 Page - Texas Instruments |
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90 / 157 page  90 TPS650830 SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS650830 Detailed Description Copyright © 2014–2016, Texas Instruments Incorporated 6.6.1.19 VCCIOCNT Register (address = 0x30) [reset = 00001010] Figure 6-41. VCCIOCNT Register Format B7 B6 B5 B4 B3 B2 B1 B0 RESERVED_V CCIOCNT CSDECAYEN VCCIOVSEL[1] VCCIOVSEL[0] AOACCNTVCC IO[1] AOACCNTVCC IO[0] CTLVVCCIO[1] CTLVVCCIO[0] 0 0 0 0 1 0 1 0 R RW RW RW RW RW RW RW LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 6-22. VCCIOCNT Register Field Descriptions Bit Field Type Reset Description 7 RESERVED_VCCIOCNT R 0 6 CSDECAYEN RW 0 Enables VCCIO decay when SLP_S0# is asserted. [wait 2us after removing FPWM, before entering DECAY mode. Direct FPWM to DECAY by SLP0Z may cause ringing. Decay exit time within 100us not guaranteed for Vout > 1V.] 0: VCCIO stays at voltage set by VCCIOVSEL independent of state of SLP_S0# 1: VCCIO decays to 0V, PGOOD is maintained when SLP_S0# is asserted (low) 5:4 VCCIOVSEL[1:0] RW 00 Output voltage select 00: 0.975V 01: 0.950V 10: 0.875V 11: 0.850V 3:2 AOACCNTVCCIO[1:0] RW 10 Mode control for exit standby (rising edge of SLP_S0#) - changes bits D[1:0] on exit 00: No change in bits D[1:0] - fast change mode disabled 01: Bits D[1:0] set to 01, Auto Mode, (automatic transition from PFM to PWM) 10: Bits D[1:0] set to 10, Auto Mode, (automatic transition from PFM to PWM) 11: Bits D[1:0] set to 11, forced PWM operation 1:0 CTLVVCCIO[1:0] RW 10 Mode control (V4) 00: Converter disabled 01: Auto Mode, (automatic transition from PFM to PWM) 10: Auto Mode, (automatic transition from PFM to PWM) 11: Forced PWM operation |
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