PIFE32251B-R68MS datasheet(66/157 Pages) TI1

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CCM

DCM

Light Load

Heavy Load

Figure: Inductor Current during DCM to CCM Transition

CCM

DCM

Light Load

Heavy Load

Figure: Inductor Current during CCM to DCM Transition

16 cycle deglitch before change

from CCM to DCM for faster

transient response

TPS650830

SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016

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Detailed Description

Figure 6-15. Operation During Load Step Transient: CCM to DCM Transition and DCM to CCM Transition

The figure above shows the inductor current of the controller during a load transient as it transitions in and

out of Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). CCM is often

referred to as pulse width modulation (PWM) mode, and DCM is referred to as pulse frequency mode

(PFM) mode. When the load step falls, there is a 16 cycle deglitch going from CCM to DCM. This allows a

fast transient response and tighter peak to peak ripple voltage. When the load step rises, there is no

deglitch time, so the controller goes directly from DCM to CCM in a quick response characteristic of CCM.

The VR1, VR3, VR4, and VR5 controllers have the CCM to DCM 16 cycle count deglitch enabled.

6.3.13.2 Voltage Regulator Startup

All the voltage regulators including the VTT LDO1 can be enabled using either pin enables or I2C

commands. The default setting uses the pin enable. The VTT LDO1 can only be enabled using the

DDR_VTT_CTRL discrete input. VTT LDO1 can be enabled by pin (DDR_VTT_CTRL) or by register

(0xE9, MSB bit 7 masks the DDR_VTT_CTRL pin, and bit 6 enables the VTT LDO1). Each Voltage

Regulator (VR) can be enabled by the enable pin (ENAVRx) or by I2C Register (xCNT). The voltage

should not be changed by register at the exact same time the voltage regulator is enabled. If a different

voltage than the default is needed at power-up, then the register (xCNT) should program the voltage first,

and then a separate command should enable the register separately. Dynamic voltage change (DVS) can

be done any time after power-up.

Each of the voltage regulators except for the VTT LDO1 are controlled by an internal softstart to make

sure the output voltage ramps up gently and does not cause huge inrush current during startup to prevent

droop on the input. The VTT LDO1 startup time is driven by the DDR memory requirements for the VTT

voltage rail - which requires that the ramp up on voltage be faster than 35 µs.

PIFE32251B-R68MS 데이터시트(PDF) 66 Page - Texas Instruments