 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
PIFE32251B-R68MS 데이터시트(PDF) 38 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
PIFE32251B-R68MS 데이터시트(HTML) 38 Page - Texas Instruments |
|
|
38 / 157 page  38 TPS650830 SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS650830 Specifications Copyright © 2014–2016, Texas Instruments Incorporated Electrical Characteristics (continued) Over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Source short circuit current limit Measured with VOUT at 0.9*Programmed voltage 2000 mA Sink short circuit current limit 2000 mA Maximum load regulation with respect to nominal Vout VVIN = 1.1 V, 1.2 V and 1.35 V, IOUT = 0 A to 1.0 A, Measured at the regulation point output capacitor with Kelvin connections made directly from the regulation point to the differential feedback pins (FBLDO1 - FBVR4N) = Output voltage relative to (VINLDO1S - FBVR4N) / 2, where VINLDO1S connected to FBVR4P on the board. -4.5% 4.5% Maximum total output voltage variation with respect to nominal Vout DC and AC, VVIN = 1.0 V to 1.42 V, IOUT = 0 A to 1.0 A, Measured at the regulation point output capacitor with Kelvin connections made directly from the regulation point to the differential feedback pins (FBLDO1 - FBVR4N) = Output voltage relative to (VINLDO1S - FBVR4N) / 2, where VINLDO1S connected to FBVR4P on the board. -5% 5% Total turn-on time (enable + ramp) Measure from LDO enable to VOUT stable. time to ramp from 0.3 V to VO(min). Continuous slope (no slope reversal). Assumes VVIN is present, with a 4 x 10- µF output capacitor bank (actual capacitance after derating). 35 µs External output capacitor (Cout) Minimum actual capacitance after derating 40 µF External input capacitor (Cin) Minimum actual capacitance after derating 10 µF Output auto discharge resistance Discharge register value: 0, Default 1000 kΩ Output auto discharge resistance, Default Discharge register value: 1 60 80 100 Ω FBLDO1 input impedance Enabled 20 25 MΩ Quiescent current into VVINLDO1 VVINLDO1 = 1.35 V, ILDO1 = 0 mA, Enabled 3.5 5 μA Quiescent current from 3.3-V reference LDO when LDO1 is enabled VVINLDO1 = 1.35 V, Enabled 250 μA LDO1 CONTROL LDO1_Powergood threshold high Fail when VOUT increasing 108% 110% 112% LDO1_Powergood threshold high hysteresis Good when VOUT decreases (after a PGOOD fail event) -5% LDO1_Powergood threshold low Fail when VOUT decreasing 88% 90% 92% LDO1_Powergood threshold low hysteresis Good when VOUT increases (after a PGOOD fail event) 5% LDO1_Powergood deglitch time for both rising and falling edges FBLDO1 voltage must cross powergood threshold and stay for at least this time to change powergood output state. Measured from FBLDO1 into or out of powergood threshold, until internal register bit toggles, for both rising and falling edges. 27 30 33 μs Overtemperature protection 130 145 160 °C Overtemperature hysteresis 10 °C VR5 Controller POWER |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
