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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIFE32251B-R68MS 데이터시트(PDF) 84 Page - Texas Instruments |
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PIFE32251B-R68MS 데이터시트(HTML) 84 Page - Texas Instruments |
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84 / 157 page  84 TPS650830 SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS650830 Detailed Description Copyright © 2014–2016, Texas Instruments Incorporated 6.6.1.13 PBCONFIG Register (address = 0x14) [reset = 00011111] Figure 6-35. PBCONFIG Register Format B7 B6 B5 B4 B3 B2 B1 B0 PWRBTNDBN CLRHT FLT[5] FLT[4] FLT[3] FLT[2] FLT[1] FLT[0] 0 0 0 1 1 1 1 1 RW RW RW RW RW RW RW RW LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 6-16. PBCONFIG Register Field Descriptions Bit Field Type Reset Description 7 PWRBTNDBN RW 0 Power button debounce 0: 30 ms 1: 0 ms (no debounce) 6 CLRHT RW 0 Reset of power button timer logic 0: No action 1: Reset of HT, bit is self clearing 5:0 FLT[5:0] RW 011111 Time that the button must be held to force an emergency reset 000000: 0 s 000001: 1 s 000010: 2 s 000011: 3 s 000100: 4 s 000101: 5 s 000110: 6 s 000111: 7 s 001000: 8 s 001001: 9 s 001010: 10 s .. 011111: 31 s ... 111100: 60 s 111101: 61 s 111110: 62 s 111111: 63 s |
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