PIFE32251B-R68MS datasheet(133/157 Pages) TI1

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133

TPS650830

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SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016

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Application and Implementation

7.2.2.2.1 Selecting the Inductor

An inductor is required to be placed between the SWVRx and the output capacitors. The inductor and

output capacitors together make the double-pole which contributes towards stability. In addition, the

inductor is directly responsible for the output ripple, efficiency, and transient performance. With an

increase in inductance used the ripple current decreases which, typically increases efficiency. However,

with an increase in inductance used, the transient performance decreases. Finally, the inductor selected

has to be rated for appropriate saturation current, core losses and DC resistance (DCR).

Use the equation below to calculate the recommended inductance for the controller. Let K IND be the ratio

of I Lripple to the Iout MAX. It is recommended that K IND is set to a value between 0.2 and 0.4.

(6)

With the chosen inductance value, the peak current for the inductor in steady state operation, I - Lmax , can

be calculated using the equation below. The rated saturation current of the inductor must be higher than

the I Lmax current.

(7)

Following these equations the preferred inductors selected for the converter are listed below in Table 7-2.

Table 7-2. Recommended Inductors

MANUFACTURER

PART NUMBER

VALUE

SIZE

HEIGHT

Cyntec

PIFE32251B-R68MS

0.68 µH

3.2 mm x 2.5 mm

1.2 mm

Würth

744383230068

0.68 µH

2.5 mm x 2 mm

1.0 mm

7.2.2.2.2 Selecting the Output Capacitors

Ceramic capacitors with low ESR values provide the lowest output voltage ripple and are recommended.

The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside

from their wide variation in capacitance over temperature, become resistive at high frequencies.

At light load currents, the converter operates in Power Save Mode and the output voltage ripple is

dependent on the output capacitor value and the PFM peak inductor current. Higher output capacitor

values minimize the voltage ripple in PFM Mode. In order to achieve specified regulation performance and

low output voltage ripple, the DC-bias characteristic of ceramic capacitors must be considered. The

effective capacitance of ceramic capacitors drops with increasing DC bias voltage.

For the output capacitors of the DCDC converters the use of a small ceramic capacitors placed as close

as possible to the inductor and the respective PGND pins of the IC is recommended. If, for any reason,

the application requires the use of large capacitors which can not be placed close to the IC, use a smaller

ceramic capacitor in parallel to the large capacitor. The small capacitor should be placed as close as

possible to the inductor and the respective PGND pins of the IC.

At the DCDC converters the recommended capacitor for use is the muRata GRM188R60J226MEAO: 22

µF, 0603, 6.3 V, ±20% or similar. This capacitor was selected to achieve the highest derated capacitance

in a small 0603 package. If the selected output voltage is greater than 3.3 V then the muRata

GRM21BR61A226ME44: 22 µF, 0805, 10 V, ±20%, or similar is recommended for use. This capacitor is

recommended to maintain the actual capacitance as DC bias increases.

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