ADPD4100 datasheet(33/101 Pages) AD

33 / 101 page

Data Sheet

ADPD4100/ADPD4101

Rev. 0 | Page 33 of 101

PRECONDITION

LED PULSES

MASK PULSE 1 AND PULSE 4

FLASH PULSE 2 AND PULSE 3

ACCUMULATED

CHARGE ON PD

INTEGRATOR

OUTPUT

INTEGRATOR

SEQUENCE

INTEGRATOR

RESET

ADC READ

MASKED LED PULSE

INTEG_WIDTH_x

MASKED LED PULSE

FLASH LED

CONNECT/FLOAT

START OF TIME SLOT

MOD_OFFSET_x

MIN_PERIOD_x

MOD_WIDTH_x

LED_WIDTH_x

LED_OFFSET_x

INTEG_OFFSET_x

PRE_WIDTH_x

(DEFAULT 8µs)

Figure 37. Four-Pulse Float Mode Operation

Table 20. Float LED Mode Settings

Group

Time Slot A

Bit Field Name

Description

Signal Path Setup

0x0100, Bits[13:12]

SAMPLE_TYPE_x

Leave at the default setting (0) for default sampling mode.

0x0100, Bits[11:10]

INPUT_R_SELECT_x

Set to 0x0 for 500 Ω series input resistor.

0x0101, Bits[8:0]

AFE_PATH_CFG_x

Set to 0x0E6 for TIA, integrator, and ADC. Bypass BPF.

0x0102, Bits[15:0]

INPxx_x

Enable desired inputs.

0x0103, Bits[14:12]

PRECON_x

Set to 0x4 to precondition anode of photodiode to the input of

the TIA.

0x0103, Bits[7:6], Bits[1:0]

VCx_SEL_x

Set to 0x2 to set ~215 mV reverse bias across photodiode.

0x0104, Bits[5:0]

TIA_GAIN_CHx_x

Select TIA gain (100 kΩ or 200 kΩ for float mode).

0x0104, Bits[9:8]

AFE_TRIM_VREF_x

Set to 0x2 to set TIA_VREF = 0.9 V.

Float Mode

Configuration

0x0107, Bits[15:8]

NUM_INT_x

Set to 1 for a single integration per group of ADC conversions.

0x0107, Bits[7:0]

NUM_REPEAT_x

Number of sequence repeats. Must be set to a multiple of 2 for

float mode.

0x0108, Bits[13:12]

MOD_TYPE_x

Set to 0x1 for float mode operation.

0x0108, Bits[9:0]

MIN_PERIOD_x

Set the period to accommodate float time plus connect time, in

1 μs increments.

0x010A, Bits[4:0]

INTEG_WIDTH_x

Integration time in µs. Set to MOD_WIDTH_x + 1.

0x010A, Bits[10:8],

Bits[14:12]

CHx_AMP_DISABLE_x

Set 0x010A, Bit 9 to 1 to power down BPF for Channel 1, Bit 13

to 1 to power down BPF for Channel 2 if Channel 2 is enabled.

0x010B, Bits[12:0]

INTEG_OFFSET_x

Integration sequence start time. Set to (MOD_OFFSET_x −

INTEG_WIDTH_x – 250 ns).

0x010C, Bits[15:8]

MOD_WIDTH_x

Sets width of connect pulse in 1 μs increments. Typical values

of 2 μs or 3 μs.

0x010C, Bits[7:0]

MOD_OFFSET_x

Sets start time of first connect pulse in 1 μs increments.

0x010D, Bits[7:4]

SUBTRACT_x

In any given sequence of four pulses, negate the math

operation in the selected position. Selections are active high

(that is, subtract if 1) and the LSB of this register maps to the

first pulse. For a float mode sequence, add pulses when the LED

flashes and subtract pulses when the LED is disabled, according

to LED_DISABLE_x.

ADPD4100 데이터시트(PDF) 33 Page - Analog Devices

ADPD4100 데이터시트(HTML) 33 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL