ADPD4100 datasheet(42/101 Pages) AD

42 / 101 page

ADPD4100/ADPD4101

Data Sheet

Rev. 0 | Page 42 of 101

TIA ADC MODE

Figure 49 shows TIA ADC mode, which bypasses the BPF and

routes the TIA output through a buffer, directly into the ADC.

TIA ADC mode is useful in applications, such as ambient light

sensing, and measuring other dc signals, such as leakage

resistance. In photodiode measurement applications using the

BPF, all background light is blocked from the signal chain and,

therefore, cannot be measured. TIA ADC mode can measure

the amount of background and ambient light. This mode can also

measure currents from other dc sources, such as leakage

resistance.

TIA

TIA_VREF

INx

BUF

ADC

Figure 49. TIA ADC Mode Block Diagram

When the devices are in TIA ADC mode, the BPF is bypassed

and the integrator stage is reconfigured as a buffer. If both

Channel 1 and Channel 2 are enabled in a single time slot, the

ADC samples Channel 1 and then Channel 2 in sequential

order in 1 µs intervals.

The recommended TIA ADC mode is one in which the BPF is

bypassed and the integrator is configured as an inverting buffer.

This mode is enabled by writing 0x0E6 to AFE_PATH_CFG_x

(Register 0x0101, Bits[8:0] for Time Slot A) to enable a signal

path that includes the TIA, integrator, and ADC. Additionally,

to configure the integrator as a buffer, set INTEG_SETUP_x

(Register 0x010A, Bit 11 for Time Slot A). With the ADC offset

bits, ADC_OFF1_x and ADC_OFF2_x, set to 0 and TIA_VREF

set to 1.265 V, the output of the ADC is at ~3000 codes for a

single pulse and a zero input current condition. As the input

current from the photodiode increases, the ADC output

increases toward 16,384 LSBs.

When configuring the integrator as a buffer, there is the option

of either using a gain of 1 or a gain of 0.7. Using the gain of 0.7

increases the usable dynamic range at the input to the TIA.

However, it is possible to overrange the ADC in this configuration

and care must be taken to not saturate the ADC. To set the buffer

gain, use the CHx_TRIM_INT_x bits. Setting CHx_TRIM_

INT_x to 0x0 or 0x1 sets a gain of 1. Setting CHx_TRIM_INT_x to

0x2 or 0x3 configures the buffer with a gain of 0.7.

Calculate the ADC output (ADCOUT) as follows:

ADCOUT = 8192 − (((2 × TIA_VREF − 2 × IINPUT_TIA × RF −

1.8 V)/146 µV/LSB) × Buffer Gain)

(3)

where:

TIA_VREF is the internal voltage reference signal for the TIA

(the default value is 1.265 V).

IINPUT_TIA is the input current to the TIA.

RF is the TIA feedback resistor.

Buffer Gain is either 0.7 or 1 based on the setting of

CHx_TRIM_INT_x.

Equation 3 is an approximation and does not account for

internal offsets and gain errors. The calculation also assumes

that the ADC offset registers are set to 0.

Configuring one time slot in TIA ADC mode is useful for

monitoring ambient and pulsed signals at the same time. The

ambient signal is monitored during the time slot configured for

TIA ADC mode, while the pulsed signal, with the ambient

signal rejected, is monitored in the time slot configured for

measuring the desired LED pulsed signal.

PROTECTING AGAINST TIA SATURATION IN

NORMAL OPERATION

One concern when operating in high light conditions, especially

with larger photodiodes, is that the TIA stage may become

saturated while the ADPD4100/ADPD4101 continue to

communicate data. The resulting saturation is not typical. The TIA,

based on its settings, can only handle a certain level of photodiode

current. Based on the way the ADPD4100/ADPD4101 are config-

ured, if there is a current level from the photodiode that is larger

than the TIA can handle, the TIA output during the LED pulse

effectively extends the current pulse, making it wider. The AFE

timing is then violated because the positive portion of the BPF

output extends into the negative section of the integration window.

Thus, the photosignal is subtracted from itself, causing the output

signal to decrease when the effective light signal increases.

Protecting Against TIA Saturation in Normal Operation

with TIA ADC Mode

TIA ADC mode monitoring is one of the ways to protect against

environments that may cause saturation. To measure the response

from the TIA and verify that this stage is not saturating, place the

device in TIA ADC mode and slightly modify the timing.

Specifically, sweep INTEG_OFFSET_x until a maximum is

achieved. This procedure aligns the ADC sampling time with

the LED pulse to measure the total amount of light falling on the

photodetector (for example, background light and LED pulse).

If this minimum value is below 16,384 LSBs, the TIA is not

saturated. However, take care, because even if the result is not

16,384 LSBs, operating the device near saturation can quickly

result in saturation if light conditions change. A safe operating

region is typically at ¾ full scale and lower. The ADC resolution

when operating in TIA ADC mode with a buffer gain = 1 is

shown in Table 25. These codes are not the same as in modes

with the BPF and integrator enabled because the BPF and

integrator are not unity-gain elements.

Table 25. ADC Resolution in TIA ADC Mode

TIA Gain (kΩ)

ADC Resolution (nA/LSB)

12.5

5.84

2.92

1.46

100

0.73

200

0.37

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