ADPD4100 datasheet(36/101 Pages) AD

36 / 101 page

ADPD4100/ADPD4101

Data Sheet

Rev. 0 | Page 36 of 101

One can determine the changing proximity by reading the

change in ADC output when ΔC is induced through the change

in the proximity of the human tissue. To be able to determine

proximity, baseline measurement without tissue in proximity

must be taken either at the same input or at another input with

an electrode attached and configured the same way.

Integrator timing width must be long enough to allow the

positive TIA response to fully settle before the negative edge of

the TIA response occurs. Also, as shown in Figure 41, the

integration timing must be centered so that the positive and

negative integration sequences completely integrate the charge

from the positive and negative TIA responses, which is essential

to integrate the maximum ac charge.

Then, ΔC is proportionate to the change in ADC output, which

is a function of the charge integrated, read at the proximity

event. For example, when VC2 is pulsed by 215 mV by setting

VC2_PULSE_x to 2, VC2_ALT_x to 2, and VC2_SEL_x to 2,

ΔC is calculated as follows:

ΔC = (−Δ(ADC Output in LSB) × 0.92 fC/LSB ×

(RINT/2RF)/Number of Pulses)/(2 × 0.215 V)

Table 21 shows the relevant registers for this measurement.

PRECONDITION

SENSOR

MODULATE

STIMULUS

+–

INTEGRATION

SEQUENCE

ADC CHANNEL 1

START OF TIME SLOT

MOD_OFFSET_x

MOD_WIDTH_x

INTEG_OFFSET_x

INTEG_WIDTH_x

TIA OUTPUT

INTEGRATOR

OUTPUT

PERIOD

(AUTOMATICALLY CALCULATED)

+–

PRE_WIDTH_x

(DEFAULT 8µs)

Figure 41. Timing Diagram for Modulate Stimulus Operation

Table 21. Modulate Stimulus Settings

Group

Time Slot A

Bit Field Name

Description

Modulate Stimulus

Setup

0x0100, Bits[13:12]

SAMPLE_TYPE_x

Leave at the default setting (0) for default sampling mode.

0x0101, Bits[8:0]

AFE_PATH_CFG_x

Set to 0x0E6 for TIA, integrator, and ADC. Bypass BPF.

0x0102, Bits[15:0]

INPxx_x

Enable desired inputs.

0x0103, Bits[14:12]

PRECON_x

Set to 0x5 to precondition sensor to TIA_VREF.

0x0103, Bits[11:10], Bits[5:4]

VCx_PULSE_x

VCx pulse control. Set to 0x2 to pulse to the alternate voltage during a

modulation pulse.

0x0103, Bits[9:8], Bits[3:2]

VCx_ALT_x

Select the alternate state for VCx during the modulation pulse.

0x0103, Bits[7:6], Bits[1:0]

VCx_SEL_x

Set to 0x1 to set VCx to TIA_VREF as primary state.

0x0104, Bits[5:0]

TIA_GAIN_CHx_x

Select TIA gain.

0x0104, Bits[9:8]

AFE_TRIM_VREF_x

Set to 0x2 to set TIA_VREF = 0.9 V.

Modulate Stimulus

Timing

0x010C, Bits[7:0]

MOD_OFFSET_x

Sets start time of first modulation pulse in 1 μs increments.

0x010C, Bits[15:8]

MOD_WIDTH_x

Sets width of modulation pulse in 1 μs increments. Typical values of 6 μs to

12 μs.

0x010A, Bits[4:0]

INTEG_WIDTH_x

Integration time in μs. Set to MOD_WIDTH_x + 1 or MOD_WIDTH_x + 2.

0x010A, Bits[10:8], Bits[14:12]

CHx_AMP_DISABLE_x

Set 0x010A, Bit 9 to 1 to power down BPF for Channel 1, Bit 13 to 1 to power

down BPF for Channel 2 if Channel 2 is enabled.

0x010B, Bits[12:0]

INTEG_OFFSET_x

Integration sequence start time. Set to MOD_OFFSET_x − 1 (if INTEG_WIDTH =

MOD_WIDTH − 1) or MOD_OFFSET_x – 2 (if INTEG_WIDTH = MOD_WIDTH − 2)

and then sweep INTEG_OFFSET_x, Bits[4:0] in 31.25 ns steps to find optimal

operating point.

0x0107, Bits[15:8]

NUM_INT_x

Set to 1 for a single integration per ADC conversion.

0x0107, Bits[7:0]

NUM_REPEAT_x

Number of sequence repeats. SNR increases as √n, where n =

NUM_REPEAT_x × NUM_INT_x.

0x0108, Bits[13:12]

MOD_TYPE_x

Set to 0x0 for continuous TIA connection.

1 This is the Time Slot A register address. Add 0x020 for the identical register address for each subsequent time slot. For example, Register 0x0100 is the location for

SAMPLE_TYPE_A. For Time Slot B, this register is at Address 0x0120. For Time Slot C, this register is at Address 0x0140. For Time Slot D, this register is at

Address 0x0160, and so on.

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