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ADPD4100 데이터시트(PDF) 40 Page - Analog Devices |
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ADPD4100 데이터시트(HTML) 40 Page - Analog Devices |
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40 / 101 page ![]() ADPD4100/ADPD4101 Data Sheet Rev. 0 | Page 40 of 101 DIGITAL INTEGRATION MODE The ADPD4100/ADPD4101 support a digital integration mode to accommodate sensors that require longer pulses than can be supported in the typical analog integration modes. Digital integration mode allows the system to use a larger LED duty cycle than the analog integration modes, which may result in the highest achievable levels of SNR, at the expense of lower ambient light rejection. TIA RF RF TIA_VREF INx VCx BUF ADC Figure 45. Signal Path for Digital Integration Mode In digital integration mode, the BPF is bypassed and the integrator is configured as a buffer, resulting in the signal path shown in Figure 45. Digital integration regions are configured by the user and separated into lit and dark regions. The LED is pulsed in the lit region, and the LED is off in the dark region. ADC samples are taken at 1 μs intervals within the lit and dark regions and are then digitally integrated. The integration of the ADC samples from the dark region is subtracted from the integration of the ADC samples from the lit region and the result is written into the relevant signal output data registers. The sum of the samples from just the dark region are available in the dark output data registers. Both signal and dark values can be written to the FIFO. The ADPD4100/ADPD4101 support one-region and two- region digital integration modes. In one-region digital integration mode, an equal number of dark and lit samples are taken where all of the dark samples are taken in the dark region just prior to the lit region. One-region digital integration mode is illustrated in the timing diagram in Figure 46. In two-region digital integration mode, an equal number of dark and lit samples are taken. However, the dark region is split such that half of the samples are taken in the dark region prior to the lit region, and the other half is taken in the dark region following the lit region. The two-region digital integration mode results in higher ambient light rejection than the one-region digital integration mode in situations with a varying ambient light level. A timing diagram for two-region digital integration mode is shown in Figure 47. Table 24 shows the relevant register settings for the digital integration modes of operation. Note that only a single channel can be used in digital integration mode. Two channels are not supported for digital integration mode of operation. The MIN_ PERIOD_x bits must also be manually set with the correct period because the minimum period is not automatically calculated in digital integration mode. PRECONDITION LED START OF TIME SLOT PRECONDITION PRE_WIDTH_x LED_OFFSET_x DARK1_OFFSET_x ADC CONVERSIONS LIT_OFFSET_x LED_WIDTH_x MIN_PERIOD_x (MUST BE SET, NOT AUTOMATICALLY CALCULATED) NUM_INT_x NUM_REPEAT_x NUM_INT_x Figure 46. One-Region Digital Integration Mode Timing Diagram PRECONDITION LED START OF TIME SLOT PRECONDITION PRE_WIDTH_x LED_OFFSET_x DARK1_OFFSET_x ADC CONVERSIONS LIT_OFFSET_x DARK2_OFFSET_x LED_WIDTH_x MIN_PERIOD_x (MUST BE SET, NOT AUTOMATICALLY CALCULATED) NUM_INT_x 2 × NUM_INT_x NUM_REPEAT_x Figure 47. Two-Region Digital Integration Mode Timing Diagram |
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