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ADPD4100 데이터시트(PDF) 80 Page - Analog Devices |
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ADPD4100 데이터시트(HTML) 80 Page - Analog Devices |
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80 / 101 page ![]() ADPD4100/ADPD4101 Data Sheet Rev. 0 | Page 80 of 101 Addr Name Bits Bit Name Description Reset Access1 0x001A INT_ENABLE_YL0 [15:12] Reserved Reserved. 0x0 R 11 INTY_EN_LEV0_L INT_LEV0_L interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_L status on Interrupt Y. 0x0 R/W 10 INTY_EN_LEV0_K INT_LEV0_K interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_K status on Interrupt Y. 0x0 R/W 9 INTY_EN_LEV0_J INT_LEV0_J interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_J status on Interrupt Y. 0x0 R/W 8 INTY_EN_LEV0_I INT_LEV0_I interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_I status on Interrupt Y. 0x0 R/W 7 INTY_EN_LEV0_H INT_LEV0_H interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_H status on Interrupt Y. 0x0 R/W 6 INTY_EN_LEV0_G INT_LEV0_G interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_G status on Interrupt Y. 0x0 R/W 5 INTY_EN_LEV0_F INT_LEV0_F interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_F status on Interrupt Y. 0x0 R/W 4 INTY_EN_LEV0_E INT_LEV0_E interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_E status on Interrupt Y. 0x0 R/W 3 INTY_EN_LEV0_D INT_LEV0_D interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_D status on Interrupt Y. 0x0 R/W 2 INTY_EN_LEV0_C INT_LEV0_C interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_C status on Interrupt Y. 0x0 R/W 1 INTY_EN_LEV0_B INT_LEV0_B interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_B status on Interrupt Y. 0x0 R/W 0 INTY_EN_LEV0_A INT_LEV0_A interrupt enable. Write a 1 to this bit to enable drive of INT_LEV0_A status on Interrupt Y. 0x0 R/W 0x001B INT_ENABLE_YL1 [15:12] Reserved Reserved. 0x0 R 11 INTY_EN_LEV1_L INT_LEV1_L interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_L status on Interrupt Y. 0x0 R/W 10 INTY_EN_LEV1_K INT_LEV1_K interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_K status on Interrupt Y. 0x0 R/W 9 INTY_EN_LEV1_J INT_LEV1_J interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_J status on Interrupt Y. 0x0 R/W 8 INTY_EN_LEV1_I INT_LEV1_I interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_I status on Interrupt Y. 0x0 R/W 7 INTY_EN_LEV1_H INT_LEV1_H interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_H status on Interrupt Y. 0x0 R/W 6 INTY_EN_LEV1_G INT_LEV1_G interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_G status on Interrupt Y. 0x0 R/W 5 INTY_EN_LEV1_F INT_LEV1_F interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_F status on Interrupt Y. 0x0 R/W 4 INTY_EN_LEV1_E INT_LEV1_E interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_E status on Interrupt Y. 0x0 R/W 3 INTY_EN_LEV1_D INT_LEV1_D interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_D status on Interrupt Y. 0x0 R/W 2 INTY_EN_LEV1_C INT_LEV1_C interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_C status on Interrupt Y. 0x0 R/W 1 INTY_EN_LEV1_B INT_LEV1_B interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_B status on Interrupt Y. 0x0 R/W 0 INTY_EN_LEV1_A INT_LEV1_A interrupt enable. Write a 1 to this bit to enable drive of INT_LEV1_A status on Interrupt Y. 0x0 R/W |
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