ADPD4100 datasheet(93/101 Pages) AD

93 / 101 page

Data Sheet

ADPD4100/ADPD4101

Rev. 0 | Page 93 of 101

Addr

Name

Bits

Bit Name

Description

Reset Access

0x022D PATTERN_J

[3:0]

REVERSE_INTEG_x

Four-pulse integration reverse pattern. Set to 1 to reverse

the integrator positive/negative pulse order in the

matching position in a group of four pulses. The LSB maps

to the first pulse.

0x0

R/W

0x024D PATTERN_K

0x026D PATTERN_L

0x0110 DATA_FORMAT_A

[15:11] DARK_SHIFT_x

Number of bits to shift the dark data to the right before

writing to the FIFO for Time Slot x. Selectable between

0 bits and 32 bits.

0x0

R/W

0x0130 DATA_FORMAT_B

0x0150 DATA_FORMAT_C

0x0170 DATA_FORMAT_D

[10:8]

DARK_SIZE_x

Number of bytes of dark data to be written to the FIFO for

Time Slot x. Selectable between 0 bytes and 4 bytes.

0x0

R/W

0x0190 DATA_FORMAT_E

0x01B0 DATA_FORMAT_F

[7:3]

SIGNAL_SHIFT_x

Number of bits to shift the signal data to the right before

writing to the FIFO for Time Slot x. Selectable between

0 bits and 32 bits.

0x0

R/W

0x01D0 DATA_FORMAT_G

0x01F0 DATA_FORMAT_H

0x0210 DATA_FORMAT_I

[2:0]

SIGNAL_SIZE_x

Number of bytes of signal data to be written to the FIFO

for Time Slot x. Selectable between 0 bytes and 4 bytes.

0x3

R/W

0x0230 DATA_FORMAT_J

0x0250 DATA_FORMAT_K

0x0270 DATA_FORMAT_L

0x0111 LIT_DATA_FORMAT_A [15:8]

Reserved

0x0

R/W

0x0131 LIT_DATA_FORMAT_B [7:3]

LIT_SHIFT_x

Number of bits to shift the lit data to the right before

writing to the FIFO for Time Slot x. Selectable between

0 bits and 32 bits.

0x0

R/W

0x0151 LIT_DATA_FORMAT_C

0x0171 LIT_DATA_FORMAT_D

0x0191 LIT_DATA_FORMAT_E [2:0]

LIT_SIZE_x

Number of bytes of lit data to be written to the FIFO for

Time Slot x. Selectable between 0 bytes and 4 bytes.

0x3

R/W

0x01B1 LIT_DATA_FORMAT_F

0x01D1 LIT_DATA_FORMAT_G

0x01F1 LIT_DATA_FORMAT_H

0x0211 LIT_DATA_FORMAT_I

0x0231 LIT_DATA_FORMAT_J

0x0251 LIT_DATA_FORMAT_K

0x0271 LIT_DATA_FORMAT_L

0x0112 DECIMATE_A

[15:11] Reserved

Write 0x0.

0x0

0x0132 DECIMATE_B

[10:4]

DECIMATE_FACTOR_x Decimate sample divider. Output data rate is sample

rate ÷ (DECIMATE_FACTOR_x + 1). Decimate by 1 to 128.

0x0

R/W

0x0152 DECIMATE_C

0x0172 DECIMATE_D

[3:0]

DECIMATE_TYPE_x

Decimation type select.

0x0

R/W

0x0192 DECIMATE_E

0: block sum, CIC first order.

0x01B2 DECIMATE_F

1: signal uses CIC second order.

0x01D2 DECIMATE_G

10: signal uses CIC third order.

0x01F2 DECIMATE_H

11: signal uses CIC fourth order.

0x0212 DECIMATE_I

100: reserved.

0x0232 DECIMATE_J

0x0252 DECIMATE_K

0x0272 DECIMATE_L

ADPD4100 데이터시트(PDF) 93 Page - Analog Devices

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