ADPD4100 datasheet(27/101 Pages) AD

27 / 101 page

Data Sheet

ADPD4100/ADPD4101

Rev. 0 | Page 27 of 101

The rest of the write operation is shown in Figure 29, which

shows the two data bytes that are written to the 16-bit register.

Registers are written only when all 16 bits are shifted in before a

stop bit occurs. The ADPD4101 sends an acknowledge for each

byte received. Additional pairs of byte operations can be repeated

prior to the stop bit occurring. The address auto-increments

after each complete write. Register writes occur only after each

pair of bytes is written.

The I2C short read operations are shown in Figure 30 and

Figure 31. Like the write operation, the first byte pair selects the

ADPD4101 and specifies the register address (with the L/S bit

low) to read from.

Figure 31 shows the rest of the read operation. This sequence

starts with a start bit, selects the ADPD4101, and indicates that

a read operation follows. The ADPD4101 sends an acknowledge

to indicate data to be sent. The ADPD4101 then shifts out the

each byte after it is sent by the ADPD4101, if additional bytes

are to be read. The same address incrementing is used for reads

as well.

To read multiple bytes from the FIFO or from sequential

registers, simply repeat the middle byte operation as shown in

Figure 31.

The first portion of a long write operation is shown in Figure 32.

The second half of the long write is the same as for the short

write, as shown in Figure 29.

The first half of a long read operation is shown in Figure 33.

The second half is the same as shown in Figure 31.

SCL

S SLVA6 SLVA5 SLVA4 SLVA3 SLVA2 SLVA1

SLVA

WRITE

ACK

L/S

ACK

SDA

Figure 30. I2C Short Read First Half

SCL

S SLVA6 SLVA5 SLVA4 SLVA3 SLVA2 SLVA1 SLVA0 READ ACK

D15

D14

D13

D12

D11

D10

ACK

NACK

SDA

Figure 31. I2C Short Read Second Half

SCL

SDA

S SLVA6 SLVA5 SLVA4 SLVA3 SLVA2 SLVA1 SLVA0 WRITE ACK

L/S

A14

A13

A12

A11

A10

ACK

ACK D15

Figure 32. I2C Long Write First Half

SCL

SDA

S SLVA6 SLVA5 SLVA4 SLVA3 SLVA2 SLVA1 SLVA0 WRITE

ACK

L/S

A14

A13

A12

A11

A10

ACK

Figure 33. I2C Long Read First Half

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